EVAL-AD5501EBZ Analog Devices Inc, EVAL-AD5501EBZ Datasheet - Page 15

• Manufacturer Part Number: EVAL-AD5501EBZ
• Description: Evaluation Board I.c.
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD5501EBZ

• Number Of Dac's: 1
• Number Of Bits: 12
• Outputs And Type: 1, Single Ended
• Sampling Rate (per Second): 16M
• Data Interface: SPI™, QSPI™, MICROWIRE™, and DSP
• Settling Time: 45µs
• Dac Type: Voltage
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 105°C
• Utilized Ic / Part: AD5501
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SERIAL INTERFACE
The AD5501 has a serial interface ( SYNC , SCLK, SDI, and
SDO), which is compatible with SPI standards, as well as with
most DSPs. The AD5501 allows writing of data, via the serial
interface, to the input and control registers. The DAC register is
not directly writeable or readable.
The input shift register is 16 bits wide (see Table 8). The 16-bit
word consists of one read/write (R/ W ) control bit, followed by
three address bits and 12 DAC data bits. Data is loaded MSB first.
WRITE MODE
To write to a register, the R/ W bit should be 0. The three address
bits in the input register (see
register to update. The address bits (A2 to A0) should be 001 to
write to the DAC input register or 111 to write to the control
register. Data is clocked into the selected register during the
remaining 12 clocks of the same frame.
diagram of a typical AD5501 write sequence. The write
sequence begins by bringing the
SDI line is clocked into the 16-bit shift register on the falling
edge of SCLK. On the 16th falling clock edge, the last data bit is
clocked in and the programmed function is executed (that is, a
change in the selected DAC input register or a change in the
mode of operation). The AD5501 does not require a continuous
SCLK and dynamic power can be saved by transmitting clock
pulses during a serial write only. At this stage, the SYNC line
can be kept low or be brought high. In either case, it must be
brought high for a minimum of 20 ns before the next write
sequence for a falling edge of SYNC to initiate the
Table 8. Input Register Bit Map
DB15
R/ W
Table 9. Input Register Bit Functions
Bit
R/ W
A2, A1, A0
D11:D0
1
No operation command
DB14
A2
DB13
A1
Description
Indicates a read from or a write to the addressed register.
These bits determine if the input register or the control register is to be accessed.
A2
0
0
0
0
1
1
1
1
Data bits.
DB12
A0
Table 9
SYNC line low. Data on the
) then determine the
DB11
Figure 3
DB10
A1
0
0
1
1
0
0
1
1
shows a timing
DB9
Rev. A | Page 15 of 20
DB8
A0
0
1
0
1
0
1
0
1
DB7
next write sequence. Operate all interface pins close to the
supply rails to minimize power consumption in the digital input
buffers.
READ MODE
The AD5501 allows data readback via the serial interface from
the DAC input register and the control register. To read back a
register, it is first necessary to tell the AD5501 that a readback is
required. This is achieved by setting the R/ W bit to 1. The three
address bits then determine the register from which data is to
be read back. Data from the selected register is clocked out of
the SDO pin on the next 12 clocks of the same frame.
The SDO pin is normally three-stated but becomes driven on
the rising edge of the fifth clock pulse. The pin remains driven
until the data from the register has been clocked out or the
SYNC pin is returned high.
requirements during a read operation. Note that due to timing
requirements of t
interface during a read operation should not exceed 9 MHz.
WRITING TO THE CONTROL REGISTER
The control register is written when Bits[DB14:DB12] are 1.
The control register sets the power-up state of the DAC output.
A write to the control register must be followed by another
write operation. The second write operation can be a write to a
DAC input register or a NOP write. Figure 17 shows some
typical combinations.
DB6
Function
NOP
DAC input register
Reserved
Reserved
Reserved
Reserved
Reserved
Control register
Data
DB5
1
14
(110 ns), the maximum speed of the SPI
DB4
Figure 4
DB3
shows the timing
DB2
DB1
AD5501
DB0