EVAL-AD5501EBZ Analog Devices Inc, EVAL-AD5501EBZ Datasheet - Page 16

• Manufacturer Part Number: EVAL-AD5501EBZ
• Description: Evaluation Board I.c.
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD5501EBZ

• Number Of Dac's: 1
• Number Of Bits: 12
• Outputs And Type: 1, Single Ended
• Sampling Rate (per Second): 16M
• Data Interface: SPI™, QSPI™, MICROWIRE™, and DSP
• Settling Time: 45µs
• Dac Type: Voltage
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 105°C
• Utilized Ic / Part: AD5501
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5501
Table 10. Control Register Functions Bit Map
DB15
R/ W
1
2
Table 11. Control Register Function Bit Descriptions
Bit No.
DB0
DB1
DB2
DB[3:5]
DB6
INTERFACING EXAMPLES
The SPI interface of the AD5501 is designed to allow it to be easily
connected to industry-standard DSPs and microcontrollers.
Figure 18 shows how the AD5501 can be connected to the
Analog Devices, Inc., Black fin ® DSP. The Black fin has an integrated
SPI port that can be connected directly to the SPI pins of the
AD5501. Programmable input/output pins are also available
and can be used to read or set the state of the digital input or
output pins associated with the interface.
Read only bit. This bit should be 0 when writing to the control register
X is don’t care.
ADSP-BF531
DB14
1
Figure 18. Interfacing to a Blackfin DSP
Bit Name
C0
C1
C2
C3 to C5
C6
DB13
1
SPISELx
MOSI
MISO
PF10
SCK
PF9
PF8
PF7
DB12
1
CONTROL REGISTER
CONTROL REGISTER
CONTROL REGISTER
CONTROL REGISTER
DB11
X
2
WRITE TO
WRITE TO
WRITE TO
WRITE TO
WRITE N
Description
C0 = 0: the device is not in thermal shutdown mode.
C0 = 1: the thermal shutdown mode is activated.
C1 = 0: reserved. This bit should be 0 when writing to the control register..
C2 = 0: DAC channel power-down (default).
C2 = 1: DAC channel power-up.
C3 to C5 = 0: reserved. These bits should be 0 when writing to the control register.
C6 = 0: output connected to AGND through a 20 kΩ resistor.
C6 = 1: output is three-stated (default).
DB10
X
2
SYNC
SCLK
SDI
SDO
R_SEL
LDAC
CLR
ALARM
AD5501
Figure 17. Control Register Write Sequences
DB9
X
2
Rev. A | Page 16 of 20
CONTROL REGISTER
CONTROL REGISTER
DB8
X
DAC REGISTER
2
WRITE N + 1
WRITE TO
WRITE TO
WRITE TO
NOP
DB7
X
2
The Analog Devices
two serial ports (SPORTs). Figure 19 shows how one SPORT
can be used to control the AD5501. In this example, the transmit
frame synchronization (TFS) pin is connected to the receive
frame synchronization (RFS) pin. The transmit and receive
clocks (TCLK and RCLK) are also connected together. The user
can write to the AD5501 by writing to the transmit register. When a
read operation is performed, the data is clocked out of the AD5501
on the last 12 SCLKs. The DSP receive interrupt can be used to
indicate when the read operation is complete.
DB6
C6
ADSP-21065L
Figure 19. Interfacing to an ADSP-21065L DSP
DAC REGISTER
DB5
C5
WRITE N + 2
WRITE TO
RCLKx
TCLKx
FLAG
FLAG
FLAG
FLAG
DRxA
DTxA
RFSx
TFSx
NOP
ADSP-21065L
0
1
2
3
DB4
C4
DB3
C3
is a floating point DSP with
SYNC
SCLK
SDI
SDO
R_SEL
LDAC
CLR
ALARM
DB2
C2
AD5501
DB1
C1
DB0
C0
1