KSZ8842-16MBL Micrel Inc, KSZ8842-16MBL Datasheet - Page 118

2-Port Ethernet Switch/Repeater + Generic (8, 16-bit) Bus Interface ( )

KSZ8842-16MBL

Manufacturer Part Number
KSZ8842-16MBL
Description
2-Port Ethernet Switch/Repeater + Generic (8, 16-bit) Bus Interface ( )
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8842-16MBL

Controller Type
Ethernet Switch Controller
Interface
PCI
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LFBGA
Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog/Digital
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.5V
Operating Supply Voltage (min)
3.1V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1635 - BOARD EVALUATION KSZ8842-16MVL576-1634 - BOARD EVALUATION KSZ8842-16MQL
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-3076

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8842-16MBL
Manufacturer:
Micrel
Quantity:
227
Part Number:
KSZ8842-16MBL
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8842-16MBLI
Manufacturer:
Micrel
Quantity:
327
Part Number:
KSZ8842-16MBLI
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8842-16MBLI TR
Manufacturer:
Micrel Inc
Quantity:
10 000
Examples:
Additional MIB Information
Per Port MIB counters are designed as “read clear”. That is, these counters will be cleared after they are read.
All Ports Dropped Packet MIB counters are not cleared after they are accessed. The application needs to keep track of
overflow and valid conditions on these counters.
Micrel, Inc.
October 2007
1. MIB Counter Read (read port 1 “Rx64Octets” counter at indirect address offset 0x0E)
Then
2. MIB Counter Read (read port 2 “Rx64Octets” counter at indirect address offset 0x2E)
Then
3. MIB Counter Read (read “Port1 TX Drop Packets” counter at indirect address offset 0x100)
Then
Write to reg. IACR with 0x1c0e (set indirect address and trigger a read MIB counters operation)
Read reg. IADR5 (MIB counter value 31-16) // If bit 31 = 1, there was a counter overflow
Read reg. IADR4 (MIB counter value 15-0)
Write to reg. IACR with 0x1c2e (set indirect address and trigger a read MIB counters operation)
Read reg. IADR5 (MIB counter value 31-16) // If bit 31 = 1, there was a counter overflow
Read reg. IADR4 (MIB counter value 15-0)
Write to reg. IACR with 0x1d00 (set indirect address and trigger a read MIB counters operation)
Read reg. IADR4 (MIB counter value 15-0)
118
// If bit 30 = 0, restart (reread) from this register
// If bit 30 = 0, restart (reread) from this register
KSZ8842-16/32 MQL/MVL/MVLI/MBL
M9999-102207-1.9

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