KSZ8842-16MBL Micrel Inc, KSZ8842-16MBL Datasheet - Page 44

2-Port Ethernet Switch/Repeater + Generic (8, 16-bit) Bus Interface ( )

KSZ8842-16MBL

Manufacturer Part Number
KSZ8842-16MBL
Description
2-Port Ethernet Switch/Repeater + Generic (8, 16-bit) Bus Interface ( )
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8842-16MBL

Controller Type
Ethernet Switch Controller
Interface
PCI
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LFBGA
Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog/Digital
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.5V
Operating Supply Voltage (min)
3.1V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1635 - BOARD EVALUATION KSZ8842-16MVL576-1634 - BOARD EVALUATION KSZ8842-16MQL
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-3076

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Advanced Switch Functions
Spanning Tree Support
To support spanning tree, the host port is the designated port for the processor.
The other ports can be configured in one of the five spanning tree states via “transmit enable”, “receive enable” and
“learning disable” register settings in registers P1CR2 and P2CR2 for ports 1 and 2, respectively. Table 9 shows the port
setting and software actions taken for each of the five spanning tree states.
Micrel, Inc.
October 2007
Disable State
The port should
not forward or
receive any
packets. Learning
is disabled.
Blocking State
Only packets to
the processor are
forwarded.
Listening State
Only packets to
and from the
processor are
forwarded.
Learning is
disabled.
Learning State
Only packets to
and from the
processor are
forwarded.
Learning is
enabled.
Forwarding
State
Packets are
forwarded and
received normally.
Learning is
enabled.
Port Setting
“transmit
enable = 0,
receive
enable = 0,
learning
disable =1”
Port Setting
“transmit
enable = 0,
receive
enable = 0,
learning
disable =1”
Port Setting
“transmit
enable = 0,
receive
enable = 0,
learning
disable =1”
Port Setting
“transmit
enable = 0,
receive
enable = 0,
learning
disable = 0”
Port Setting
“transmit
enable = 1,
receive enable
= 1, learning
disable = 0”
Software Action
The processor should not send any packets to the port. The switch may still
send specific packets to the processor (packets that match some entries in
the “static MAC table” with “overriding bit” set) and the processor should
discard those packets. Address learning is disabled on the port in this
state.
Software Action
The processor should not send any packets to the port(s) in this state. The
processor should program the “Static MAC table” with the entries that it
needs to receive (for example, BPDU packets). The “overriding” bit should
also be set so that the switch will forward those specific packets to the
processor. Address learning is disabled on the port in this state.
Software Action
The processor should program the “Static MAC table” with the entries that it
needs to receive (for example, BPDU packets). The “overriding” bit should
be set so that the switch will forward those specific packets to the
processor. The processor may send packets to the port(s) in this state.
Address learning is disabled on the port in this state.
Software Action
The processor should program the “Static MAC table” with the entries that it
needs to receive (for example, BPDU packets). The “overriding” bit should
be set so that the switch will forward those specific packets to the
processor. The processor may send packets to the port(s) in this state.
Address learning is enabled on the port in this state.
Software Action
The processor programs the “Static MAC table” with the entries that it
needs to receive (for example, BPDU packets). The “overriding” bit is set so
that the switch forwards those specific packets to the processor. The
processor can send packets to the port(s) in this state. Address learning is
enabled on the port in this state.
Table 9. Spanning Tree States
44
KSZ8842-16/32 MQL/MVL/MVLI/MBL
M9999-102207-1.9

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