KSZ8842-16MVL Micrel Inc, KSZ8842-16MVL Datasheet - Page 117

• Manufacturer Part Number: KSZ8842-16MVL
• Description: 2-Port Ethernet Switch/Repeater + Generic (8, 16-bit) Bus Interface( )
• Manufacturer: Micrel Inc

Specifications of KSZ8842-16MVL

• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-LQFP
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1635 - BOARD EVALUATION KSZ8842-16MVL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-2119; KSZ8842-16MVL

Format of “All Ports Dropped Packet” MIB Counters
Note: “All Ports Dropped Packet” MIB Counters do not indicate overflow or validity; therefore, the application must keep track of
overflow and valid conditions.
“All Ports Dropped Packet” MIB counters are read using indirect memory access. The address offsets for these counters
are shown in Table 17.
Micrel, Inc.
Offset
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
Bit
30-16
15-0
October 2007
Default
-
0x0000
Counter Name
Rx1024to1522Octets
TxLoPriorityByte
TxHiPriorityByte
TxLateCollision
TxPausePkts
TxBroadcastPkts
TxMulticastPkts
TxUnicastPkts
TxDeferred
TxTotalCollision
TxExcessiveCollision
TxSingleCollision
TxMultipleCollision
Offset
0x100
0x101
0x103
0x104
Table 17. “All Ports Dropped Packet” MIB Counters Indirect Memory Offsets
R/W
N/A
RO
Counter Name
Port1 TX Drop Packets
Port2 TX Drop Packets
Port1 RX Drop Packets
Port2 RX Drop Packets
Table 16. “All Ports Dropped Packet” MIB Counters Format
Table 15. Port 1 MIB Counters Indirect Memory Offset
Description
Reserved
Counter Value
Description
Total Rx packets (bad packets included) that are between 1024 and 1522 octets in
length (upper limit depends on max packet size setting)
Tx lo-priority good octet count, including PAUSE packets
Tx hi-priority good octet count, including PAUSE packets
The number of times a collision is detected later than 512 bit-times into the Tx of a
packet
Number of PAUSE frames transmitted by a port
Tx good broadcast packets (not including error broadcast or valid multicast packets)
Tx good multicast packets (not including error multicast packets or valid broadcast
packets)
Tx good unicast packets
Tx packets by a port for which the 1st Tx attempt is delayed due to the busy medium
Tx total collision, half duplex only
A count of frames for which Tx fails due to excessive collisions
Successfully Tx frames on a port for which Tx is inhibited by exactly one collision
Successfully Tx frames on a port for which Tx is inhibited by more than one collision
117
Description
TX packets dropped due to lack of resources
TX packets dropped due to lack of resources
RX packets dropped due to lack of resources
RX packets dropped due to lack of resources
KSZ8842-16/32 MQL/MVL/MVLI/MBL
M9999-102207-1.9