MT9T031C12STC Aptina LLC, MT9T031C12STC Datasheet - Page 41

• Manufacturer Part Number: MT9T031C12STC
• Description: IC SENSOR IMAGE COLOR 48CLCC
• Manufacturer: Aptina LLC
• Series: Micron®DigitalClarity®r
• Type: CMOS Imagingr

Specifications of MT9T031C12STC

• Pixel Size: 3.2µm x 3.2µm
• Active Pixel Array: 2048H x 1536V
• Frames Per Second: 12 ~ 93
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 48-CLCC
• Brief Features: Superior Low Light Performance, Programmable Controls, Low Dark Current, High Frame Rate
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +60°C
• Ic Function: Digital Image Sensor
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 557-1450 - KIT HEAD BOARD FOR MT9T031557-1451 - KIT DEV FOR MT9T031
• Lead Free Status / Rohs Status: Compliant
• Other names: 557-1452

Table 14:
I/O Timing
Figure 22:
PDF: 3682685119/Source: 9830567334
MT9T031_DS - Rev.E 5/11 EN
f
t
tr_sclk
tf_sclk
tr_sdat
tf_sdat
t
t
t
t
t
t
t
t
t
t
t
SCLK
SCLK
SRTH
SDH
SDS
SHAW
AHSW
STPS
STPH
SHAR
AHSR
SDHR
SDSR
Symbol
FRAME_VALID/
LINE_VALID
Data[7:0]
EXTCLK
PIXCLK
Serial interface input clock frequency
Serial Input clock period
SCLK Duty Cycle
SCLK rise time
SCLK fall time
S
S
Start hold time
S
S
S
ACK hold to S
Stop setup time
Stop hold time
S
ACK hold to S
S
S
Two-Wire Serial Bus Characteristics
DATA
DATA
DATA
DATA
DATA
DATA
DATA
DATA
I/O Timing Diagram
rise time
fall time
hold time
setup time
hold to ACK
hold to ACK
hold
setup
DATA
DATA
Definition
By default, the MT9T031 launches pixel data, FRAME_VALID and LINE_VALID with the
rising edge of PIXCLK. The expectation is that the user captures D
FRAME_VALID and LINE_VALID using the falling edge of PIXCLK. See Figure 22 and
Table 15 for I/O Timing (AC) characteristics.
t PD
t EXTCLK
FRAME_VALID leads LINE_VALID by 369 PIXCLKs
as described in Figure 8 and Table 4.
t PFH
t PLH
Pxl_0
t R
t PD
WRITE/READ
WRITE/READ
WRITE/READ
90%
10%
Condition
Pxl_1
41
WRITE
WRITE
WRITE
WRITE
READ
READ
READ
READ
–
–
–
t F
MT9T031: 1/2-Inch 3-Mp Digital Image Sensor
Pxl_2
t CP
Min
100
580
580
580
580
20
–
–
–
–
–
–
0
0
0
0
0
0
FRAME_VALID trails LINE_VALID
by 142 PIXCLKs as described in
Figure 8 and Table 4.
173.4
172.6
145.8
64.2
623
623
623
623
Typ
50
63
–
–
0
0
0
0
0
0
t RP
©2006 Aptina Imaging Corporation. All rights reserved.
Electrical Specifications
OUT
90%
10%
[11:0],
Max
83.3
200
680
680
680
680
1.2
79
–
–
–
–
0
0
0
0
0
0
Pxl_n
t FP
MHz
Unit
μsec
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
t PFL
t PLL