MAX9485ETP Maxim Integrated Products, MAX9485ETP Datasheet - Page 13

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MAX9485ETP

Manufacturer Part Number
MAX9485ETP
Description
Clock Generators & Support Products Programmable Audio C lock Generator Gener
Manufacturer
Maxim Integrated Products
Datasheet
A specific frequency could be achieved through multi-
ple settings (Table 1) such as different sampling rate
and multiplication factors (256, 384, and 768). However,
due to the difference of internal structure, the CLK out-
puts jitter may be different for each setting. Table 15 lists
CLK output frequencies and jitter for the various set-
tings. For best performance, the user should choose the
setting that gives the lowest jitter at a specific frequency.
The MAX9485’s high oscillator frequency makes proper
layout important to ensure stability. For best performance,
place components as close as possible to the device.
Digital or AC transient signals on GND can create noise
at the clock output. Return GND to the highest-quality
ground available. Bypass V
and 0.001µF capacitors, placed as close to the device
as possible. Careful PC board ground layout minimizes
crosstalk between the outputs and digital inputs.
Output CLK Frequency Setting
______________________________________________________________________________________
Power-Supply Bypassing and
Programmable Audio Clock Generator
Ground Management
DD
and V
with Low Jitter
DD_P
with 0.1µF
Table 15. Jitter Measurements of Output
CLKs
FOUT (MHz)
67.7376
33.8688
33.8688
24.5760
24.5760
24.5760
22.5792
18.4320
16.9344
16.3840
12.2880
12.2880
11.2896
73.728
49.152
36.864
36.864
8.1920
9.126
4.608
3.072
SCALING
FACTOR
768
768
768
768
384
768
384
768
384
256
256
384
384
256
256
384
256
768
256
384
256
f
S
88.2
44.1
88.2
88.2
44.1
44.1
(kHz)
96
64
48
96
32
64
96
48
64
48
32
12
32
12
12
T
RJ(RMS)
23.2
42.6
41.3
55.1
84.8
134
170
100
106
250
198
324
21
40
37
44
66
92
50
59
69
(ps)
13

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