MAX9485ETP Maxim Integrated Products, MAX9485ETP Datasheet - Page 8

• Manufacturer Part Number: MAX9485ETP
• Description: Clock Generators & Support Products Programmable Audio C lock Generator Gener
• Manufacturer: Maxim Integrated Products

Programmable Audio Clock Generator
Table 1. Sampling Frequency and Output Clock
Figure 1. CLK_OUT Transient Timing
Figure 2. VCXO Tuning Range
8
CLK_OUT
HIGH
27.0054
26.9946
LOW
SDA
_______________________________________________________________________________________
FREQUENCY
SAMPLING
27
f
S
44.1
88.2
PULSE
0V
(kHz)
12
32
48
64
96
ACK
400ppm
STABLE
256 x f
t
FST
TRANSITION
11.2896
12.2880
16.3840
22.5792
24.5760
8.1920
3.072
S
(MHz)
3V
STABLE
V
384 x f
TUN
CLK_OUT
12.2880
16.9344
18.4320
24.5760
33.8688
36.8640
4.608
S
(MHz)
The MAX9485 internal VCXO produces a 27MHz refer-
ence clock for the PLL used to generate CLK_OUT1
and CLK_OUT2. The oscillator uses a 27MHz crystal as
the base frequency reference and has a voltage-con-
trolled tuning input for micro adjustment in a range of
±200ppm. The tuning voltage V
3V as shown in Figure 2. Use an AT-cut crystal that
oscillates at 27MHz on its fundamental mode with
±30ppm. Use a crystal shunt capacitor less than 12pF,
including board parasitic capacitance. Choose an
oscillator with a load capacitance less than 14pF to
achieve ±200ppm pullability. VCXO, a free-run oscilla-
tor, and the buffered output MCLK are not affected by
power-on reset and external reset. VCXO has a 5ms
settling time at power-on and 10µs at a change of the
V
The MAX9485 can be used as a synthesizer with a
27MHz input reference clock. For this mode, connect
the 27MHz input clock to X1. Connect TUN to V
leave X2 open. This configuration is for applications
where the micro tuning is not needed and there is a
27MHz system master clock available.
The MAX9485 has an internal reset function. The
device resets at power-up or can be externally reset by
driving
default values. MODE sets the device’s programming
mode at power-up. When MODE = low, the device is
set to software-programmable mode. Set MODE = high
for hardwired mode. If MODE = low, the reset sets
default values for CLK_OUT1 and CLK_OUT2 to 256 x
f
CLK_OUT1 and CLK_OUT2, according to the values of
the hardwired inputs.
S
TUN
with f
voltage.
RST low. The reset function sets the registers to
Voltage-Controlled Crystal Oscillator
S
= 32kHz. If MODE = high, the reset sets
768 x f
24.5760
33.8688
36.8640
49.1520
67.7376
73.7280
9.126
S
(MHz)
Chip Reset Function
TUN
SAMPLING RATE
can vary from 0 to
Standard
Standard
Standard
Standard
Double
Double
Double
(VCXO)
DD
and