PEF81902FV1.1 Lantiq, PEF81902FV1.1 Datasheet - Page 180

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PEF81902FV1.1

Manufacturer Part Number
PEF81902FV1.1
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF81902FV1.1

Lead Free Status / RoHS Status
Supplier Unconfirmed
LD
4.5.4
S_ CMD
Value after reset: 08
Important: This register - except bit DPRIO - is writable only if the Layer 1 state machine
of the device is disabled (S_CONF0.L1SW = 1) and implemented in software! With the
device layer 1 state machine enabled, the signals from this register are automatically
generated. DPRIO can also be written in intelligent NT mode.
XINF
DPRIO
PD
Data Sheet
7
Level Detection
0 =
1 =
S_CMD - S-Transceiver Command Register
Transmit INFO
000 =
001 =
010 =
011 =
100 =
101 =
11x =
D-Channel Priority
0 =
1 =
Power Down
0 =
XINF
No receive signal has been detected on the line.
Any receive signal has been detected on the line.
Transmit INFO 0
reserved
Transmit INFO 2
Send continuous pulses at 192 kbit/s alternating or 96 kHz
rectangular, respectively (TM2)
Send single pulses at 4 kbit/s with alternating polarity
corresponding to 2 kHz fundamental mode (TM1)
reserved
Priority class 1 for D channel access on IOM
Priority class 2 for D channel access on IOM
The transceiver is set to operational mode
H
Transmit INFO 4
DPRIO
read/write
166
1
PD
Register Description
LP_A
Address:
PEF 81902
2001-11-12
0
0
34
H

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