MCP4706A0T-E/CH Microchip Technology, MCP4706A0T-E/CH Datasheet - Page 61

• Manufacturer Part Number: MCP4706A0T-E/CH
• Description: Single, 8-bit NV DAC With Ext Vref And I2C Interface 6 SOT-23 T/R
• Manufacturer: Microchip Technology
• Series: -r

Specifications of MCP4706A0T-E/CH

• Number Of Converters: 1
• Conversion Rate: 1
• Resolution: 8 bit
• Interface Type: I2C
• Settling Time: 6 us
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-23-6
• Maximum Power Dissipation: 452 mW
• Minimum Operating Temperature: - 40 C
• Supply Current: 210 uA
• Number Of Bits: 8
• Data Interface: EEPROM, I²C, Serial
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 452mW
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Outputs And Type: *
• Lead Free Status / Rohs Status: Details

7.9
The Gain error (see
between the actual full-scale output voltage from the
ideal output voltage of the DAC transfer curve. The
gain error is calculated after nullifying the offset error,
or full scale error minus the offset error.
The gain error indicates how well the slope of the actual
transfer function matches the slope of the ideal transfer
function. The gain error is usually expressed as percent
of full-scale range (% of FSR) or in LSb.
In the MCP4706/4716/4726, the gain error is not
calibrated at the factory and most of the gain error is
contributed by the output buffer (op amp) saturation
near the code range beyond 4000d. For the
applications that need the gain error specification less
than 1% maximum, the user may consider using the
DAC code range between 100d and 4000d instead of
using full code range (code 0 to 4095d). The DAC
output of the code range between 100d and 4000d is
much more linear than full-scale range (0 to 4095d).
The gain error can be calibrated out by software in the
application.
FIGURE 7-4:
Error Example.
© 2011 Microchip Technology Inc.
Output
Analog
0
Gain Error
Zero-Scale
Error
Actual Transfer Function
Gain Error and Full-Scale
Figure
DAC Input Code
after Offset Error is removed
Actual Transfer Function
Ideal Transfer Function
7-4) is the difference
Full-Scale
Error
Gain Error
7.10
The Gain error drift is the variation in gain error due to
a change in ambient temperature. The gain error drift is
typically expressed in ppm/
7.11
The Offset error drift is the variation in offset error due
to a change in ambient temperature. The offset error
drift is typically expressed in ppm/
7.12
The Settling time is the time delay required for the V
voltage to settle into its new output value. This time is
measured from the start of code transition, to when the
V
In the MCP47X6, the settling time is a measure of the
time delay until the V
LSb of its final value, when the volatile DAC Register
changes from 400h to C00h.
7.13
Major-code transition glitch is the impulse energy
injected into the DAC analog output when the code in
the DAC register changes state. It is normally specified
as the area of the glitch in nV-Sec, and is measured
when the digital code is changed by 1 LSb at the major
carry transition (Example: 011...111 to 100...
000, or 100... 000 to 011 ... 111).
7.14
The Digital feedthrough is the glitch that appears at the
analog output caused by coupling from the digital input
pins of the device. The area of the glitch is expressed
in nV-Sec, and is measured with a full scale change
(Example: all 0s to all 1s and vice versa) on the digital
input pins. The digital feedthrough is measured when
the DAC is not being written to the output register.
7.15
PSRR indicates how the output of the DAC is affected
by changes in the supply voltage. PSRR is the ratio of
the change in V
output of the DAC. The V
V
OUT
DD
MCP4706/4716/4726
is varied +/- 10%, and expressed in dB or µV/V.
voltage is within the specified accuracy.
Gain Error Drift
Offset Error Drift
Settling Time
Major-Code Transition Glitch
Digital Feedthrough
Power-Supply Rejection Ratio
(PSRR)
OUT
to a change in V
OUT
OUT
o
voltage reaches within 0.5
C.
is measured while the
o
C.
DS22272A-page 61
DD
for full-scale
OUT