PIC12HV609T-I/MS Microchip Technology, PIC12HV609T-I/MS Datasheet - Page 120

• Manufacturer Part Number: PIC12HV609T-I/MS
• Description: 1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 8 MSOP 3x3mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12HV609T-I/MS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Size: 1.75KB (1K x 14)
• Program Memory Type: FLASH
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Processor Series: PIC12H
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS- 232 , USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC12HV609T-I/MSTR

PIC12F609/615/617/12HV609/615
FIGURE 12-8:
TABLE 12-7:
DS41302D-page 120
INTCON
IOC
PIR1
PIE1
Legend: x = unknown, u = unchanged, – = unimplemented read as ‘0’, q = value depends upon condition.
INSTRUCTION FLOW
Name
Note 1: PIC12F615/617/HV615 only.
GIE bit
(INTCON reg.)
INTF flag
(INTCON reg.)
CLKOUT
INT pin
OSC1
Note 1: INTF flag is sampled here (every Q1).
Instruction
Executed
Instruction
Fetched
PC
2: Asynchronous interrupt latency = 3-4 T
3: CLKOUT is available only in INTOSC and RC Oscillator modes.
4: For minimum width of INT pulse, refer to AC specifications in
5: INTF is enabled to be set any time during the Q4-Q1 cycles.
Shaded cells are not used by the interrupt module.
Bit 7
GIE
(3)
—
—
—
is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.
SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPTS
Q1
ADIF
ADIE
PEIE
Bit 6
Inst (PC – 1)
Inst (PC)
—
(1)
INT PIN INTERRUPT TIMING
Q2
PC
(1)
(1)
(4)
Q3 Q4
CCP1IE
CCP1IF
IOC5
Bit 5
T0IE
(5)
(1)
(1)
Q1
Inst (PC + 1)
Inst (PC)
INTE
IOC4
Bit 4
Q2
(1)
—
—
PC + 1
Q3 Q4
CY
. Synchronous latency = 3 T
GPIE
CMIF
CMIE
IOC3
Bit 3
Interrupt Latency
Q1
IOC2
Bit 2
T0IF
Dummy Cycle
—
—
Q2
PC + 1
—
Q3 Q4
TMR2IE
TMR2IF
Section 16.0 “Electrical Specifications”
INTF
IOC1
Bit 1
(2)
CY
, where T
(1)
(1)
Q1
Dummy Cycle
Inst (0004h)
TMR1IE -00- 0-00 -000 0-00
TMR1IF -00- 0-00 -000 0-00
GPIF
IOC0
Q2
Bit 0
0004h
CY
= instruction cycle time. Latency
Q3 Q4
 2010 Microchip Technology Inc.
0000 0000 0000 0000
--00 0000 --00 0000
POR, BOR
Value on
Q1
.
Inst (0005h)
Q2
Inst (0004h)
0005h
Value on
all other
Q3 Q4
Resets