PIC12HV609T-I/MS Microchip Technology, PIC12HV609T-I/MS Datasheet - Page 14

• Manufacturer Part Number: PIC12HV609T-I/MS
• Description: 1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 8 MSOP 3x3mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12HV609T-I/MS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Size: 1.75KB (1K x 14)
• Program Memory Type: FLASH
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Processor Series: PIC12H
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS- 232 , USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC12HV609T-I/MSTR

PIC12F609/615/617/12HV609/615
TABLE 2-1:
DS41302D-page 14
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Addr
1:
2:
INDF
TMR0
PCL
STATUS
FSR
GPIO
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
VRCON
CMCON0
CMCON1
Name
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
IRP and RP1 bits are reserved, always maintain these bits clear.
Read only register.
PIC12F609/HV609 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module’s Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
CMVREN
T1GINV
CMON
IRP
Bit 7
GIE
—
—
—
—
(1)
TMR1GE
RP1
COUT
PEIE
Bit 6
—
—
—
—
—
(1)
T1CKPS1
CMOE
Bit 5
T0IE
VRR
RP0
GP5
—
—
—
T1CKPS0 T1OSCEN
CMPOL
FVREN
T1ACS
Bit 4
INTE
GP4
TO
—
Write Buffer for upper 5 bits of Program Counter
CMHYS
CMIF
GPIE
Bit 3
GP3
VR3
PD
—
—
T1SYNC
CMR
Bit 2
GP2
T0IF
VR2
—
—
Z
TMR1CS
T1GSS
Bit 1
INTF
GP1
VR1
DC
—
—
—
 2010 Microchip Technology Inc.
CMSYNC
TMR1ON
TMR1IF
CMCH
GPIF
Bit 0
GP0
VR0
C
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
--x0 x000
---0 0000
0000 0000
---- 0--0
xxxx xxxx
xxxx xxxx
0000 0000
0-00 0000
0000 -0-0
---0 0-10
POR, BOR
Value on
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
25, 115
53, 115
25, 115
18, 115
25, 115
43, 115
25, 115
20, 115
22, 115
57, 115
57, 115
62, 115
76, 116
72, 116
73, 116
Page
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