PIC12HV609T-I/MS Microchip Technology, PIC12HV609T-I/MS Datasheet - Page 99

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PIC12HV609T-I/MS

Manufacturer Part Number
PIC12HV609T-I/MS
Description
1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 8 MSOP 3x3mm T/R
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12HV609T-I/MS

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Processor Series
PIC12H
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS- 232 , USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
5
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Other names
PIC12HV609T-I/MSTR
11.4.1
In Half-Bridge mode, two pins are used as outputs to
drive push-pull loads. The PWM output signal is output
on the CCP1/P1A pin, while the complementary PWM
output signal is output on the P1B pin (see Figure 11-8).
This mode can be used for Half-Bridge applications, as
shown in Figure 11-9, or for Full-Bridge applications,
where four power switches are being modulated with
two PWM signals.
In Half-Bridge mode, the programmable dead-band delay
can be used to prevent shoot-through current in Half-
Bridge power devices. The value of the PDC<6:0> bits of
the PWM1CON register sets the number of instruction
cycles before the output is driven active. If the value is
greater than the duty cycle, the corresponding output
remains
Section 11.4.6 “Programmable Dead-Band Delay
mode” for more details of the dead-band delay
operations.
FIGURE 11-9:
 2010 Microchip Technology Inc.
Standard Half-Bridge Circuit (“Push-Pull”)
Half-Bridge Output Driving a Full-Bridge Circuit
inactive
HALF-BRIDGE MODE
during
EXAMPLE OF HALF-BRIDGE APPLICATIONS
the
P1A
P1B
PIC12F609/615/617/12HV609/615
entire
cycle.
P1A
P1B
FET
Driver
FET
Driver
See
FET
Driver
FET
Driver
Since the P1A and P1B outputs are multiplexed with
the PORT data latches, the associated TRIS bits must
be cleared to configure P1A and P1B as outputs.
FIGURE 11-8:
P1A
P1B
td = Dead-Band Delay
Note 1: At this time, the TMR2 register is equal to the
Load
V+
(2)
(2)
2: Output signals are shown as active-high.
(1)
td
PR2 register.
Pulse Width
Load
Period
td
FET
Driver
FET
Driver
EXAMPLE OF HALF-
BRIDGE PWM OUTPUT
+
-
+
-
(1)
DS41302D-page 99
Period
(1)

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