PIC16F721T-I/ML Microchip Technology, PIC16F721T-I/ML Datasheet - Page 109

• Manufacturer Part Number: PIC16F721T-I/ML
• Description: 7 KB FLASH, 256 B SRAM, 18 I/O 20 QFN 4x4mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F721T-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.0
The Capture/Compare/PWM module is a peripheral
which allows the user to time and control different
events. In Capture mode, the peripheral allows the
timing of the duration of an event. The Compare mode
allows the user to trigger an external event when a
predetermined amount of time has expired. The PWM
mode can generate a Pulse-Width Modulated signal of
varying frequency and duty cycle.
The timer resources used by the module are shown in
Table
Additional information on CCP modules is available in
the Application Note AN594, “Using the CCP Modules”
(DS00594).
REGISTER 15-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
U-0
15-1.
—
CAPTURE/COMPARE/PWM
(CCP) MODULE
Unimplemented: Read as ‘0’
DC1:B1: PWM Duty Cycle Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
CCP1M<3:0>: CCP mode Select bits
0000 = Capture/Compare/PWM off (resets CCP module)
0001 = Unused (reserved)
0010 = Compare mode, toggle output on match (CCP1IF bit of the PIRx register is set)
0011 = Unused (reserved)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP1IF bit of the PIR1 register is set)
1001 = Compare mode, clear output on match (CCP1IF bit of the PIR1 register is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set of the PIRx register,
1011 = Compare mode, trigger special event (CCP1IF bit of the PIR1register is set, TMR1 is reset
11xx = PWM mode.
U-0
—
CCP1CON: CCP1 CONTROL REGISTER
and A/D conversion is started if the ADC module is enabled. CCP1 pin is unaffected.)
CCP1 pin is unaffected)
W = Writable bit
‘1’ = Bit is set
R/W-0
DC1
R/W-0
B1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCP1M3
R/W-0
TABLE 15-1:
Capture
Compare
PWM
PIC16F/LF720/721
CCP Mode
CCP1M2
R/W-0
CCP MODE – TIMER
RESOURCES REQUIRED
x = Bit is unknown
CCP1M1
R/W-0
Timer Resource
DS41430A-page 109
Timer1
Timer1
Timer2
CCP1M0
R/W-0
bit 0