PIC16F721T-I/ML Microchip Technology, PIC16F721T-I/ML Datasheet - Page 80

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PIC16F721T-I/ML

Manufacturer Part Number
PIC16F721T-I/ML
Description
7 KB FLASH, 256 B SRAM, 18 I/O 20 QFN 4x4mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F721T-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F/LF720/721
9.2.4
The ADC module can operate during Sleep. This
requires the ADC clock source to be set to the F
option. When the F
ADC waits one additional instruction before starting the
conversion. This allows the SLEEP instruction to be
executed, which can reduce system noise during the
conversion. If the ADC interrupt is enabled, the device
will wake-up from Sleep when the conversion
completes. If the ADC interrupt is disabled, the ADC
module is turned off after the conversion completes,
although the ADON bit remains set.
When the ADC clock source is something other than
F
sion to be aborted and the ADC module is turned off,
although the ADON bit remains set.
9.2.5
The Special Event Trigger of the CCP module allows
periodic ADC measurements without software inter-
vention. When this trigger occurs, the GO/DONE bit is
set by hardware and the Timer1 counter resets to zero.
Using the Special Event Trigger does not assure proper
ADC timing. It is the user’s responsibility to ensure that
the ADC timing requirements are met.
Refer
(CCP) Module”
9.2.6
This is an example procedure for using the ADC to
perform an Analog-to-Digital conversion:
1.
2.
3.
DS41430A-page 80
RC
, a SLEEP instruction causes the present conver-
Configure Port:
• Disable pin output driver (Refer to the TRIS
• Configure pin as analog (Refer to the ANSEL
Configure the ADC module:
• Select ADC conversion clock
• Select ADC input channel
• Turn on ADC module
Configure ADC interrupt (optional):
• Clear ADC interrupt flag
• Enable ADC interrupt
• Enable peripheral interrupt
• Enable global interrupt
register)
register)
to
ADC OPERATION DURING SLEEP
SPECIAL EVENT TRIGGER
A/D CONVERSION PROCEDURE
Section 15.0
for more information.
RC
clock source is selected, the
“Capture/Compare/PWM
(1)
RC
4.
5.
6.
7.
8.
EXAMPLE 9-1:
;This code block configures the ADC
;for polling, Vdd reference, Frc clock
;and AN0 input.
;
;Conversion start & polling for completion
; are included.
;
BANKSEL
MOVLW
MOVWF
BANKSEL
BSF
BANKSEL
BSF
BANKSEL
MOVLW
MOVWF
CALL
BSF
BTFSC
GOTO
BANKSEL
MOVF
MOVWF
Note 1: The global interrupt can be disabled if the
Wait the required acquisition time
Start conversion by setting the GO/DONE bit.
Wait for ADC conversion to complete by one of
the following:
• Polling the GO/DONE bit
• Waiting for the ADC interrupt (interrupts
Read ADC Result.
Clear the ADC interrupt flag (required if interrupt
is enabled).
enabled)
2: Refer to
user is attempting to wake-up from Sleep
and resume in-line code execution.
Requirements”.
ADCON1
B’01110000’ ;ADC Frc clock,
ADCON1
TRISA
TRISA,0
ANSELA
ANSELA,0
ADCON0
B’00000001’;AN0, On
ADCON0
SampleTime ;Acquisiton delay
ADCON0,GO
ADCON0,GO
$-1
ADRES
ADRES,W
RESULT
Section 9.3 “A/D Acquisition
A/D CONVERSION
 2010 Microchip Technology Inc.
;
;V
;
;
;Set RA0 to input
;
;Set RA0 to analog
;
;
;Start conversion
;Is conversion done?
;No, test again
;
;Read result
;store in GPR space
DD
reference
(2)
.

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