PIC16F721T-I/ML Microchip Technology, PIC16F721T-I/ML Datasheet - Page 50

• Manufacturer Part Number: PIC16F721T-I/ML
• Description: 7 KB FLASH, 256 B SRAM, 18 I/O 20 QFN 4x4mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F721T-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F/LF720/721
6.1.4
Each PORTA pin is multiplexed with other functions. The
pins and their combined functions are briefly described
here. For specific information about individual functions
such as the A/D Converter (ADC), refer to the
appropriate section in this data sheet.
6.1.4.1
Figure 6-1
configurable to function as one of the following:
• a general purpose I/O
• an analog input for the ADC
• ICSP programming data (separate controls from
• ICD Debugging data (separate controls from
6.1.4.2
Figure 6-2
configurable to function as one of the following:
• a general purpose I/O
• an analog input for the ADC
• ICSP programming clock (separate controls from
• ICD Debugging clock (separate controls from
DS41430A-page 50
TRISA)
TRISA)
TRISA)
TRISA)
shows the diagram for this pin. This pin is
shows the diagram for this pin. This pin is
PIN DESCRIPTIONS AND
DIAGRAMS
RA0/AN0/ICSPDAT
RA1/AN1/ICSPCLK
6.1.4.3
Figure 6-3
configurable to function as one of the following:
• a general purpose I/O
• an analog input for the ADC
• external interrupt
• clock input for Timer0
The Timer0 clock input function works independently of
any TRIS register setting. Effectively, if TRISA2 = 0,
the PORTA2 register bit will output to the pad and Clock
Timer0 at the same time.
6.1.4.4
Figure 6-4
configurable to function as one of the following:
• a general purpose I/O
• Master Clear Reset with weak pull-up
6.1.4.5
Figure 6-5
configurable to function as one of the following:
• a general purpose I/O
• analog input for the ADC
• Timer1 gate input
• clock output
6.1.4.6
Figure 6-6
configurable to function as one of the following:
• a general purpose I/O
• Timer1 Clock input
• clock input
shows the diagram for this pin. This pin is
shows the diagram for this pin. This pin is
shows the diagram for this pin. This pin is
shows the diagram for this pin. This pin is
RA2/AN2/T0CKI/INT
RA3/MCLR/V
RA4/AN3/T1G/CLKOUT
RA5/T1CKI/CLKIN
 2010 Microchip Technology Inc.
PP