PIC16F721T-I/ML Microchip Technology, PIC16F721T-I/ML Datasheet - Page 175

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PIC16F721T-I/ML

Manufacturer Part Number
PIC16F721T-I/ML
Description
7 KB FLASH, 256 B SRAM, 18 I/O 20 QFN 4x4mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F721T-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
21.2
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
 2010 Microchip Technology Inc.
Instruction Descriptions
Add W and f
[ label ] ADDWF
0  f  127
d 0,1
(W) + (f)  (destination)
C, DC, Z
Add the contents of the W register
with register ‘f’. If ‘d’ is ‘0’, the
result is stored in the W register. If
‘d’ is ‘1’, the result is stored back
in register ‘f’.
AND W with f
[ label ] ANDWF
0  f  127
d 0,1
(W) .AND. (f)  (destination)
Z
AND the W register with register
‘f’. If ‘d’ is ‘0’, the result is stored in
the W register. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
[ label ] ADDLW
0  k  255
(W) + k  (W)
C, DC, Z
The contents of the W register
are added to the eight-bit literal ‘k’
and the result is placed in the
W register.
[ label ] ANDLW
0  k  255
(W) .AND. (k)  (W)
Z
The contents of W register are
AND’ed with the eight-bit literal
‘k’. The result is placed in the W
register.
Add literal and W
AND literal with W
f,d
f,d
k
k
BCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BSF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
PIC16F/LF720/721
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0  f  127
0  b  7
skip if (f<b>) = 0
None
If bit ‘b’ in register ‘f’ is ‘1’, the next
instruction is executed.
If bit ‘b’ in register ‘f’ is ‘0’ the next
instruction is discarded and a NOP
is executed instead, making this a
2-cycle instruction.
Bit Clear f
[ label ] BCF
0  f  127
0  b  7
0  (f<b>)
None
Bit ‘b’ in register ‘f’ is cleared.
Bit Set f
[ label ] BSF
0  f  127
0  b  7
1  (f<b>)
None
Bit ‘b’ in register ‘f’ is set.
f,b
f,b
DS41430A-page 175

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