PIC16LF1518-E/SS Microchip Technology, PIC16LF1518-E/SS Datasheet - Page 143

28-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 1.8V-3.6V 2

PIC16LF1518-E/SS

Manufacturer Part Number
PIC16LF1518-E/SS
Description
28-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 1.8V-3.6V 2
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16LF1518-E/SS

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC16LF151x
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
TABLE 16-1:
FIGURE 16-2:
 2010 Microchip Technology Inc.
Legend: Shaded cells are outside of recommended range.
Note 1:
Clock Source
ADC Clock Period (T
Fosc/16
Fosc/32
Fosc/64
Fosc/2
Fosc/4
Fosc/8
ADC
F
2:
3:
4:
RC
T
Set GO bit
CY
Holding capacitor is disconnected from analog input (typically 100 ns)
The F
These values violate the minimum required T
For faster conversion times, the selection of another clock source is recommended.
The ADC clock period (T
derived from the system clock F
to be performed with the device in Sleep mode.
- T
AD
Conversion starts
RC
ADC CLOCK PERIOD (T
ADCS<2:0>
T
AD
source has a typical T
1 T
000
100
001
101
010
110
x11
ANALOG-TO-DIGITAL CONVERSION T
AD
AD
b9
)
2 T
AD
b8
1.0-6.0 s
3 T
AD
100 ns
200 ns
400 ns
20 MHz
800 ns
1.6 s
3.2 s
) and total ADC conversion time can be minimized when the ADC clock is
AD
b7
4 T
AD
(2)
(2)
(2)
OSC
(1,4)
time of 1.6 s for V
AD
AD
. However, the F
b6
5 T
) V
On the following cycle:
ADRESH:ADRESL is loaded, GO bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
Preliminary
1.0-6.0 s
S
AD
125 ns
250 ns
b5
. DEVICE OPERATING FREQUENCIES
0.5 s
16 MHz
1.0 s
2.0 s
4.0 s
6 T
AD
time.
AD
(2)
b4
(2)
(2)
(1,4)
Device Frequency (F
7 T
RC
DD
PIC16(L)F1516/7/8/9
AD
b3
clock source must be used when conversions are
.
1.0-6.0 s
AD
8
250 ns
500 ns
8.0 s
8 MHz
CYCLES
1.0 s
2.0 s
4.0 s
T
AD
b2
9 T
(3)
(2)
(2)
(1,4)
AD
b1
10
OSC
T
1.0-6.0 s
AD
b0
16.0 s
500 ns
)
8.0 s
11
4 MHz
1.0 s
2.0 s
4.0 s
(3)
(2)
(3)
(1,4)
DS41452A-page 143
1.0-6.0 s
16.0 s
32.0 s
64.0 s
8.0 s
1 MHz
2.0 s
4.0 s
(3)
(3)
(3)
(3)
(1,4)

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