PIC16LF1518-E/SS Microchip Technology, PIC16LF1518-E/SS Datasheet - Page 186

• Manufacturer Part Number: PIC16LF1518-E/SS
• Description: 28-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 1.8V-3.6V 2
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1518-E/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 28KB (16K x 14)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: *
• Processor Series: PIC16LF151x
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16(L)F1516/7/8/9
The I
features:
• Master mode
• Slave mode
• Byte NACKing (Slave mode)
• Limited Multi-master support
• 7-bit and 10-bit addressing
• Start and Stop interrupts
• Interrupt masking
• Clock stretching
• Bus collision detection
• General call address matching
• Address masking
• Address Hold and Data Hold modes
• Selectable SDA hold times
Figure 21-2
ule in Master mode.
interface module in Slave mode.
FIGURE 21-2:
DS41452A-page 186
2
C interface supports the following modes and
SDA
SCL
is a block diagram of the I
Figure 21-3
MSSP BLOCK DIAGRAM (I
SDA in
is a diagram of the I
Bus Collision
SCL in
2
C interface mod-
Read
MSb
Generate (SSPCON2)
Address Match detect
Preliminary
Write collision detect
2
end of XMIT/RCV
Start bit, Stop bit,
State counter for
Clock arbitration
C
Start bit detect,
Stop bit detect
Acknowledge
2
SSPBUF
C™ MASTER MODE)
SSPSR
LSb
Write
Clock
Shift
data bus
Internal
Set/Reset: S, P, SSPSTAT, WCOL, SSPOV
Reset SEN, PEN (SSPCON2)
Set SSPIF, BCLIF
 2010 Microchip Technology Inc.
[SSPM 3:0]
Baud Rate
Generator
(SSPADD)