ISP1505ABS,518 NXP Semiconductors, ISP1505ABS,518 Datasheet - Page 59

• Manufacturer Part Number: ISP1505ABS,518
• Description: RF Transceiver USB ULPI TRANSCEIVER
• Manufacturer: NXP Semiconductors

Specifications of ISP1505ABS,518

• Number Of Transceivers: 1
• Esd Protection: YeskV
• Operating Supply Voltage (typ): Not RequiredV
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): Not RequiredV
• Operating Supply Voltage (min): Not RequiredV
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Supply Voltage: 1.65 V to 3.6 V
• Mounting Style: SMD/SMT
• Package / Case: HVQFN-24
• Lead Free Status / RoHS Status: Compliant
• Other names: 935278318518 ISP1505ABS-T

NXP Semiconductors
15. Dynamic characteristics
Table 51.
V
Typical values are at V
[1]
Table 52.
V
ISP1505A_ISP1505C_3
Product data sheet
Symbol
Reset
t
t
t
t
t
Crystal or clock applied to XTAL1
f
t
t
t
V
Output CLOCK characteristics
f
t
t
t
Symbol
V
t
t
W(POR)
w(REG1V8_H)
w(REG1V8_L)
W(RESET_N)
PWRUP
i(XTAL1)
jit(i)(XTAL1)RMS
r(XTAL1)
f(XTAL1)
o(CLOCK)
jit(o)(CLOCK)RMS
startup(PLL)
startup(o)(CLOCK)
su(DATA)
h(DATA)
CC
CC
i(XTAL1)
o(CLOCK)
f
(XTAL1)(p-p)
CC(I/O)
i(XTAL1)
= 3.0 V to 3.6 V; V
The internal PLL is triggered only on the positive edge from the crystal oscillator. Therefore, the duty cycle is not critical.
= 3.0 V to 3.6 V; T
= 1.65 V to 1.95 V
Parameter
DATA set-up time with respect to
the rising edge of pin CLOCK
DATA hold time with respect to
the rising edge of pin CLOCK
Dynamic characteristics: reset and clock
Dynamic characteristics: digital I/O pins
Parameter
internal power-on reset pulse
width
REG1V8 HIGH pulse width
REG1V8 LOW pulse width
external RESET_N pulse width
regulator start-up time
input frequency on pin XTAL1
RMS input jitter on pin XTAL1
input duty cycle on pin XTAL1
input frequency tolerance on
pin XTAL1
rise time on pin XTAL1
fall time on pin XTAL1
peak-to-peak voltage on
pin XTAL1
output frequency on pin CLOCK
RMS output jitter on pin CLOCK
output clock duty cycle on
pin CLOCK
PLL startup time
output CLOCK start-up time
CC
amb
CC(I/O)
= 3.3 V; V
= 40 C to +85 C; unless otherwise specified.
= 1.65 V to 3.6 V; T
CC(I/O)
= 3.3 V; T
Conditions
20 pF total external load
per pin
20 pF total external load
per pin
amb
Rev. 03 — 26 August 2008
amb
= 40 C to +85 C; unless otherwise specified.
Conditions
4.7 F
pins REG1V8 and REG3V3
ISP1505ABS
ISP1505CBS
ISP1505ABS
ISP1505CBS
applicable only when clock is
applied on pin XTAL1
only for square wave input
only for square wave input
only for square wave input
measured from power good or
assertion of pin STP
= +25 C; unless otherwise specified.
20 % capacitor each on
ULPI HS USB host and peripheral transceiver
ISP1505A; ISP1505C
Min
5.7
0
[1]
Typ
-
-
Min
0.2
2
11
200
-
-
-
-
-
-
-
-
-
0.566
-
-
45
-
450
Typ
-
-
-
-
-
19.2
26
-
-
50
50
-
-
-
60
-
50
650
650
Max
-
-
© NXP B.V. 2008. All rights reserved.
Max
-
-
-
-
1
-
-
200
300
-
200
5
5
1.95
-
500
55
-
900
Unit
ns
ns
58 of 75
Unit
ns
ms
MHz
MHz
ps
ps
%
ppm
ns
ns
V
MHz
ps
%
s
s
s
s
s