ISP1504ABS,118 NXP Semiconductors, ISP1504ABS,118 Datasheet - Page 35

RF Transceiver USB ULPI TRANSCEIVER

ISP1504ABS,118

Manufacturer Part Number
ISP1504ABS,118
Description
RF Transceiver USB ULPI TRANSCEIVER
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1504ABS,118

Number Of Transceivers
1
Esd Protection
YeskV
Operating Supply Voltage (typ)
Not RequiredV
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
Not RequiredV
Operating Supply Voltage (min)
Not RequiredV
Pin Count
32
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Supply Voltage
1.65 V to 3.6 V
Mounting Style
SMD/SMT
Package / Case
HVQFN-32
Lead Free Status / RoHS Status
Compliant
Other names
935278308118 ISP1504ABS-T
NXP Semiconductors
Table 17.
ISP1504A_ISP1504C_3
Product data sheet
Parameter name
RXCMD delay (J and K)
RXCMD delay (SE0)
TX start delay
TX end delay (packets)
TX end delay (SOF)
RX start delay
RX end delay
Fig 14. Example of using the ISP1504 to transmit and receive USB data
DATA [ 7:0 ]
CLOCK
NXT
STP
DIR
PHY pipeline delays
9.8.1.1 ISP1504 pipeline delays
9.8.1.2 Allowed link decision time
9.8.1 USB packet timing
9.8 USB packet transmit and receive
An example of a packet transmit and receive is shown in
packets, refer to UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1 .
The ISP1504 delays are shown in
Pin Interface (ULPI) Specification Rev. 1.1, Section 3.8.2.6.2 .
The amount of clock cycles allocated to the link to respond to a received packet and
correctly receive back-to-back packets is given in
values given in
packet sequences and timing are shown in
UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1, Section 3.8.2.6.3 .
link sends
TXCMD
TXCMD
High-speed PHY delay
1 to 2
3 to 4
6 to 9
5 to 6
5 to 6
4
4
ISP1504
TXCMD
accepts
Table 18
the next data;
DATA
link sends
ISP1504
accepts
Rev. 03 — 7 April 2008
for correct USB system operation. Examples of high-speed
end of data
link signals
Table
Full-speed PHY delay
4
4 to 6
6 to 10
not applicable
not applicable
not applicable
17 to 18
ULPI bus
17. For detailed description, refer to UTMI+ Low
is idle
Figure 15
ISP1504A; ISP1504C
turnaround
asserts DIR,
turnaround
ISP1504
Table
causing
cycle
and
18. Link designs must follow
RXCMD
Figure
ULPI HS USB OTG transceiver
(NXT LOW)
Figure
ISP1504
RXCMD
sends
Low-speed PHY delay
4
16 to 18
74 to 75
not applicable
not applicable
not applicable
122 to 123
14. For details on USB
16. For details, refer to
DATA
(NXT HIGH)
USB data
ISP1504
sends
© NXP B.V. 2008. All rights reserved.
turnaround
DIR, causing
turnaround
deasserts
ISP1504
cycle
004aaa626
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