MT8VDDT6464HG-335F3 Micron Technology Inc, MT8VDDT6464HG-335F3 Datasheet - Page 10

• Manufacturer Part Number: MT8VDDT6464HG-335F3
• Manufacturer: Micron Technology Inc

Specifications of MT8VDDT6464HG-335F3

• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 200SODIMM
• Device Core Size: 64b
• Organization: 64Mx64
• Total Density: 512MByte
• Chip Density: 512Mb
• Maximum Clock Rate: 333MHz
• Operating Supply Voltage (typ): 2.5V
• Operating Current: 1.4A
• Number Of Elements: 8
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 200
• Mounting: Socket
• Lead Free Status / RoHS Status: Not Compliant

I
Table 9:
PDF: 09005aef8092973f / Source: 09005aef80921669
DD8C32_64x64H.fm - Rev. D 9/08 EN
Parameter/Condition
Operating one bank active-precharge current:
t
cycle; Address and control inputs changing once every two clock
cycles
Operating one bank active-read-precharge current: BL = 4;
t
inputs changing once per clock cycle
Precharge power-down standby current: All device banks idle;
Power-down mode;
Idle standby current: CS# = HIGH; All device banks idle;
t
changing once per clock cycle; V
Active power-down standby current: One device bank active;
Power-down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device bank
active;
changing twice per clock cycle; Address and other control inputs
changing once per clock cycle
Operating burst read current: BL = 2; Continuous burst reads; One
device bank active; Address and control inputs changing once per
clock cycle;
Operating burst write current: BL = 2; Continuous burst writes;
One device bank active; Address and control inputs changing once
per clock cycle;
twice per clock cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank
interleaving reads (BL = 4) with auto precharge;
t
READ or WRITE commands
DD
CK =
RC =
CK =
CK =
Specifications
t
t
t
t
RC (MIN);
CK (MIN); DQ, DM, and DQS inputs changing once per clock
CK (MIN); CKE = HIGH; Address and other control inputs
CK (MIN); Address and control inputs change only during active
t
RC =
t
CK =
t
RAS (MAX);
I
Values are for the MT46V32M8 DDR SDRAM only and are computed from values specified in the
256Mb (32 Meg x 8) component data sheet
DD
t
CK =
t
CK =
t
CK (MIN); I
Specifications and Conditions – 256MB (Die Revision K)
t
t
CK =
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing
t
CK (MIN); I
t
t
t
CK =
CK (MIN); CKE = LOW
CK (MIN); CKE = LOW
OUT
IN
t
CK (MIN); DQ, DM, and DQS inputs
= 0mA
= V
OUT
REF
= 0mA; Address and control
for DQ, DM, and DQS
256MB, 512MB (x64, SR) 200-Pin DDR SDRAM SODIMM
t
t
t
t
RC =
RC =
RFC =
RFC = 7.8125µs
t
t
RC (MIN);
RC (MIN);
t
RFC (MIN)
10
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Symbol
I
I
I
I
I
I
I
DD
I
I
DD
DD
I
DD
I
I
DD
DD
DD
DD
DD
DD
DD
DD
4W
3N
5A
4R
2P
2F
3P
0
1
5
6
7
1,440
1,440
1,280
2,320
-40B
800
960
400
280
480
32
48
32
Electrical Specifications
©2004 Micron Technology, Inc. All rights reserved.
1,280
1,280
1,280
2,160
-335
720
920
400
240
440
32
48
32
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA