ISP1161A1BD,151 STEricsson, ISP1161A1BD,151 Datasheet - Page 11

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ISP1161A1BD,151

Manufacturer Part Number
ISP1161A1BD,151
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1161A1BD,151

Lead Free Status / RoHS Status
Supplier Unconfirmed
ISP1161A1_4
Product data sheet
Table 2.
[1]
Symbol
D_DP
H_DM1
H_DP1
H_DM2
H_DP2
H_OC1
H_OC2
V
AGND
V
A0
A1
n.c.
DGND
D0
D1
CC
reg(3.3)
Symbol names with an overscore (e.g. NAME) represent active LOW signals.
[1]
Pin description for LQFP64
Pin
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Rev. 04 — 29 January 2009
Type
AI/O
AI/O
AI/O
AI/O
AI/O
I
I
-
-
-
I
I
-
-
I/O
I/O
Description
USB D+ data line for DC upstream port; when not in use, this
pin must be left open
USB D data line for HC downstream port 1
USB D+ data line for HC downstream port 1
USB D data line for HC downstream port 2; when not in use,
this pin must be left open
USB D+ data line for HC downstream port 2; when not in use,
this pin must be left open
overcurrent sensing input for HC downstream port 1
overcurrent sensing input for HC downstream port 2
power supply voltage input (3.0 V to 3.6 V or
4.75 V to 5.25 V). This pin supplies the internal 3.3 V regulator
input. When connected to 5 V, the internal regulator will output
3.3 V to pins V
3.3 V, it will bypass the internal regulator.
analog ground
internal 3.3 V regulator output; when pin V
5 V, this pin outputs 3.3 V. When pin V
3.3 V, connect this pin to 3.3 V.
address input; selects command (A0 = 1) or data (A0 = 0)
address input; selects AutoMux switching to DC (A1 = 1) or
AutoMux switching to HC (A1 = 0); see
no connection
digital ground
bit 0 of bidirectional data; slew-rate controlled; TTL input;
three-state output
bit 1 of bidirectional data; slew-rate controlled; TTL input;
three-state output
…continued
USB single-chip host and device controller
reg(3.3)
, V
hold1
and V
hold2
ISP1161A1
© ST-NXP Wireless 2009. All rights reserved.
. When connected to
CC
Table 3
is connected to
CC
is connected to
10 of 140

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