ISP1161A1BD,151 STEricsson, ISP1161A1BD,151 Datasheet - Page 27

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ISP1161A1BD,151

Manufacturer Part Number
ISP1161A1BD,151
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1161A1BD,151

Lead Free Status / RoHS Status
Supplier Unconfirmed
ISP1161A1_4
Product data sheet
9.3.1 PTD data header definition
9.3 PTD data structure
The Proprietary Transfer Descriptor (PTD) data structure provides communication
between the HCD and the ISP1161A1 USB HC. The PTD data contains information
required by the USB traffic. PTD data consists of a PTD followed by its payload data, as
shown in
The PTD data structure is used by the HC to define a buffer of data that will be moved to
or from an endpoint in the USB device. This data buffer is set up for the current frame
(1 ms frame) by the HCD. The payload data for every transfer in the frame must have a
PTD as a header to describe the characteristics of the transfer. PTD data is DWORD
(double-word or 4-byte) aligned.
The PTD forms the header of the PTD data. It tells the HC the transfer type, where the
payload data should go, and the actual size of the payload data. A PTD is an 8 byte data
structure that is very important for HCD programming.
6. Transfer PTD data into HC’s FIFO buffer RAM: When PTD data is ready in the
7. HC interprets PTD data: The HC determines what USB transactions are required
8. HC performs USB transactions via USB bus interface: The HC performs the USB
9. HC informs HCD of the USB traffic results: The USB transaction status and the
Fig 25. PTD data in FIFO buffer RAM.
microprocessor’s system RAM, the HCD must transfer the PTD data from the
microprocessor’s system RAM into the ISP1161A1 internal FIFO buffer RAM.
based on the PTD data that has been transferred into the internal FIFO buffer RAM.
transactions with the specified USB device endpoint through the USB bus interface.
feedback from the specified USB device endpoint will be put back into the
ISP1161A1 HC internal FIFO buffer RAM in PTD data format. The HCD can read back
the PTD data from the internal FIFO buffer RAM.
Figure
25.
Rev. 04 — 29 January 2009
bottom
top
FIFO buffer RAM
payload data
payload data
payload data
PTD
PTD
PTD
USB single-chip host and device controller
MGT949
PTD data #1
PTD data #2
PTD data #N
ISP1161A1
© ST-NXP Wireless 2009. All rights reserved.
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