LSISAS1064 LSI, LSISAS1064 Datasheet - Page 48

• Manufacturer Part Number: LSISAS1064
• Manufacturer: LSI

Specifications of LSISAS1064

• Lead Free Status / RoHS Status: Not Compliant

2.5.3
2-22
NVSRAM Controller
Table 2.2
The LSISAS1064 provides a NVSRAM interface that supports write
journaling in Integrated Mirroring applications or provides memory space
for firmware code overflow.
This interface provides up to 24 address bits to address an NVSRAM;
however, the LSISAS1064 supports NVSRAM capacities of up to
128 Kbytes. The NVSRAM interface:
Byte lane 3 of the LSISAS1064 external memory bus (MAD[31:24])
connects to the 8-bit data bus of the NVSRAM. BWE[2]/ provides the
write enable signal for the NVSRAM. The MOE[0]/ signal enables the
attached NVSRAM to drive data.
NVSRAM configuration.
Functional Description
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
Flash ROM Address
uses an 8-bit data bus
writes a Dword, word, or byte according to the write cycle
reads 4 bytes from the NVSRAM and returns the resulting 32-bit
Dword for each AHB Dword read request
Bytes [15:12]
Bytes [11:8]
Bytes [7:4]
Flash ROM Signature Value (Cont.)
0x5A
0xA5
0x5A
Flash ROM Signature Values
Figure 2.6
0xEA
0x5A
0xA5
provides an example
0xEA
0xA5
0x5A
0xEA
0x5A
0xA5