LSISAS1064 LSI, LSISAS1064 Datasheet - Page 94
LSISAS1064
Manufacturer Part Number
LSISAS1064
Description
Manufacturer
LSI
Datasheet
1.LSISAS1064.pdf
(152 pages)
Specifications of LSISAS1064
Lead Free Status / RoHS Status
Not Compliant
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4-26
31
x
x
x
x
x
x
x
Register: 0xXX
MSI-X Table Offset
Read Only
Table 4.3
PCI Host Register Description
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
BIR Value
0
1
2
3
4
5
6
7
24 23
x
x
x
x
x
BIR Field Definitions
Base Address Register
0x10
0x14
0x18
0x1C
0x20
0x24
Reserved
Reserved
MSI-X Table Offset
This field provides an offset from the address held in the
base address registers of the device to the base of the
MSI-X table.
Table BIR
This field indicates which of the base address registers of
the device, which are located at 0x10 in PCI Configura-
tion Space, maps the MSI-X table into memory.
provides the BIR field definitions.
x
MSI-X Table Offset
x
x
16 15
x
x
x
x
x
x
x
x
8
x
7
x
x
x
x
x
Table 4.3
x
[31:3]
x
[2:0]
0
x