MC908AP32CFBE Freescale, MC908AP32CFBE Datasheet - Page 286

• Manufacturer Part Number: MC908AP32CFBE
• Manufacturer: Freescale

Specifications of MC908AP32CFBE

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PQFP
• Program Memory Type: Flash
• Program Memory Size: 32KB
• Lead Free Status / RoHS Status: Compliant

Computer Operating Properly (COP)
A COP reset pulls the RST pin low for 32 ICLK cycles and sets the COP bit in the SIM reset status register
(SRSR).
In monitor mode, the COP is disabled if the RST pin or the IRQ1 is held at V
V
19.3 I/O Signals
The following paragraphs describe the signals shown in
19.3.1 ICLK
ICLK is the internal oscillator output signal. See
specification.
19.3.2 STOP Instruction
The STOP instruction clears the COP prescaler.
19.3.3 COPCTL Write
Writing any value to the COP control register (COPCTL) (see
counter and clears bits 12 through 5 of the prescaler. Reading the COP control register returns the low
byte of the reset vector.
19.3.4 Power-On Reset
The power-on reset (POR) circuit clears the COP prescaler 4096 ICLK cycles after power-up.
19.3.5 Internal Reset
An internal reset clears the COP prescaler and the COP counter.
19.3.6 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data bus. A reset vector fetch clears
the COP prescaler.
19.3.7 COPD (COP Disable)
The COPD signal reflects the state of the COP disable bit (COPD) in the CONFIG1 register. (See
Figure 19-2 . Configuration Register 1
284
TST
on the RST pin disables the COP.
Service the COP immediately after reset and before entering or after exiting
STOP Mode to guarantee the maximum time before the first COP counter
overflow.
Place COP clearing instructions in the main program and not in an interrupt
subroutine. Such an interrupt subroutine could keep the COP from
generating a reset even while the main program is not working properly.
MC68HC908AP Family Data Sheet, Rev. 4
(CONFIG1).)
Chapter 22 Electrical Specifications
NOTE
NOTE
Figure
19.4 COP Control
19-1.
TST
Register) clears the COP
. During the break state,
Freescale Semiconductor
for ICLK frequency