MC908AP32CFBE Freescale, MC908AP32CFBE Datasheet - Page 88

• Manufacturer Part Number: MC908AP32CFBE
• Manufacturer: Freescale

Specifications of MC908AP32CFBE

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PQFP
• Program Memory Type: Flash
• Program Memory Size: 32KB
• Lead Free Status / RoHS Status: Compliant

Clock Generator Module (CGM)
6.4.3 PLL Analog Ground Pin (V
V
potential as the V
6.4.4 Oscillator Output Frequency Signal (CGMXCLK)
CGMXCLK is the oscillator output signal. It runs at the full speed of the oscillator, and is generated directly
from the crystal oscillator circuit, the RC oscillator circuit, or the internal oscillator circuit.
6.4.5 CGM Reference Clock (CGMRCLK)
CGMRCLK is a buffered version of CGMXCLK, this clock is the reference clock for the phase-locked-loop
circuit.
6.4.6 CGM VCO Clock Output (CGMVCLK)
CGMVCLK is the clock output from the VCO.
6.4.7 CGM Base Clock Output (CGMOUT)
CGMOUT is the clock output of the CGM. This signal goes to the SIM, which generates the MCU clocks.
CGMOUT is a 50 percent duty cycle clock running at twice the bus frequency. CGMOUT is software
programmable to be either the oscillator output, CGMXCLK, divided by two or the divided VCO clock,
CGMPCLK, divided by two.
6.4.8 CGM CPU Interrupt (CGMINT)
CGMINT is the interrupt signal generated by the PLL lock detector.
6.5 CGM Registers
The following registers control and monitor operation of the CGM:
88
SSA
•
•
•
•
•
is a ground pin used by the analog portions of the PLL. Connect the V
PLL control register (PCTL)
(See
PLL bandwidth control register (PBWC)
(See
PLL multiplier select registers (PMSH and PMSL)
(See
PLL VCO range select register (PMRS)
(See
PLL reference divider select register (PMDS)
(See
6.5.1 PLL Control
6.5.2 PLL Bandwidth Control
6.5.3 PLL Multiplier Select
6.5.4 PLL VCO Range Select
6.5.5 PLL Reference Divider Select
Route V
capacitors as close as possible to the package.
SS
pin.
SSA
carefully for maximum noise immunity and place bypass
Register.)
MC68HC908AP Family Data Sheet, Rev. 4
SSA
Registers.)
Register.)
)
Register.)
Register.)
NOTE
SSA
pin to the same voltage
Freescale Semiconductor