MC9S08QG8CDTER Freescale, MC9S08QG8CDTER Datasheet - Page 79

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MC9S08QG8CDTER

Manufacturer Part Number
MC9S08QG8CDTER
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S08QG8CDTER

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
512Byte
# I/os (max)
12
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Program Memory Type
Flash
Program Memory Size
8KB
Lead Free Status / RoHS Status
Compliant

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Chapter 6
Parallel Input/Output Control
This section explains software controls related to parallel input/output (I/O) and pin control. The
MC9S08QG8 has two parallel I/O ports which include a total of 12 I/O pins, one output-only pin and one
input-only pin. See
assignments and external hardware considerations of these pins. Not all pins are available on all devices
of the MC9S08QG8/4 Family; see
device.
All of these I/O pins are shared with on-chip peripheral functions as shown in
modules have priority over the I/Os so that when a peripheral is enabled, the I/O functions associated with
the shared pins are disabled. After reset, the shared peripheral functions are disabled so that the pins are
controlled by the I/O. All of the I/Os are configured as inputs (PTxDDn = 0) with pullup devices disabled
(PTxPEn = 0), except for output-only pin PTA4 which defaults to the BKGD/MS pin.
6.1
Reading and writing of parallel I/Os is performed through the port data registers. The direction, either input
or output, is controlled through the port data direction registers. The parallel I/O port function for an
individual pin is illustrated in the block diagram shown in
Freescale Semiconductor
Port Data and Data Direction
Not all general-purpose I/O pins are available on all packages. To avoid
extra current drain from floating input pins, the user reset initialization
routine in the application program must either enable on-chip pullup devices
or change the direction of unconnected pins to outputs so the pins do not
float.
Section Chapter 2, “External Signal
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Table 1-1
for the number of general-purpose pins available on your
NOTE
Description,” for more information about pin
Figure
6-1.
Table
2-2. The peripheral
77

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