ALXD800EEXJ2VD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD C3 Datasheet - Page 405

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ALXD800EEXJ2VD C3

Manufacturer Part Number
ALXD800EEXJ2VD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJ2VD C3

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Video Processor
6.7.7
6.7.7.1
The flat panel (FP) display controller converts the digital
RGB output of the Video Mixer block to digital output suit-
able for driving a TFT flat panel LCD.
Features include:
• 24-bit color support for digital pixel input.
• 170 MHz pixel clock operation supports up to
• Supports most SVGA TFT panels and the VESA FPDI
• TFT panel support provided by use of one connector
• 9-, 12-, 18-, and 24-bit 1 pixel per clock TFT support.
AMD Geode™ LX Processors Data Book
1600x1200 TFT panels.
(Flat Panel Display Interface) Revision 1.0 Specification.
allows a pass-through mode for the digital pixel input.
Control
Pixel
Data
Pixel
Flat Panel Display Controller
FP Functional Overview
24
3
Figure 6-36. Flat Panel Display Controller Block Diagram
Control Registers
TFT Timing
Generator
Engine
Dither
24
• 9+9 or 12+12-bit, and 24-bit 2 pixels per clock TFT panel
• Programmable dither, up to 64 levels.
6.7.7.2
The FP display controller contains the following functional
blocks, as shown in Figure 6-36:
• Dither Engine
• Control Registers
• TFT Timing Generator
• Panel Interface
• CRC (Cyclical Redundancy Check) Engine
support.
24
FP Architecture Overview
Engine
CRC
Interface
33234H
Panel
24
7
Panel
Data
Panel
Control
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