ALXD800EEXJ2VD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD C3 Datasheet - Page 656

• Manufacturer Part Number: ALXD800EEXJ2VD C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

8.3.4.12 SVDC - Save Segment Register and Descriptor
Operation
Description
Write the specified segment descriptor (either DS, ES, FS, GS, SS, or CS) to memory. Below is the format of the descriptor
contents in memory.
Flags Affected
None.
Exceptions
#UD
is not in DMM.
Notes
The reg field within the mod r/m byte specifies which segment’s register and descriptor should be written. Reg fields of 0,
1, 2, 3, 4, and 5 specify the ES, CS, SS, DS, FS, and GS selectors respectively. The RSDC instruction is not recognized if
the reg field is 6 or 7.
8.3.4.13 SVLDT - Save Local Descriptor Table Register and Descriptor
Operation
Description
Write the Local Descriptor Table register and descriptor to memory. Below is the format of the descriptor contents in mem-
ory.
Flags Affected
None.
656
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
IF (CPL<>0 OR (SMM_INST_EN=0 AND SMM=0 AND DMM=0))
ELSE
IF (CPL<>0 OR (SMM_INST_EN=0 AND SMM=0 AND DMM=0))
ELSE
Opcode
0F 78 /r
Opcode
0F 7A
BASE[31:24]
BASE[31:24]
If current privilege level is not 0, or the SMM_INST_EN = 0 and if the processor is not in SMM and if the processor
#UD;
MEM80 <= SEG.DESCR;
#UD;
MEM80 <= LDT.DESCR;
Instruction
SVDC sr, m80
Instruction
SVLDT m80
33234H
BASE[15:0]
BASE[15:0]
G
G
B
B
0
0
V
V
LIMIT[19:16]
LIMIT[19:16]
Clocks
7
Clocks
7
1
1
DPL
DPL
Description
Restore descriptor from memory
Description
Save LDT to memory
1
1
SELECTOR[15:3]
SELECTOR[15:3]
0
0
E W A
E W A
LIMIT[15:0]
LIMIT[15:0]
AMD Geode™ LX Processors Data Book
8
8
7
7
6
6
5
5
BASE[23:16]
BASE[23:16]
4
4
3
3
TI
TI
2
2
Instruction Set
1
1
RPL
RPL
0
0
+8
+0
+8
+0
+4
+4