PSB21373HV11XT Infineon Technologies, PSB21373HV11XT Datasheet - Page 185

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PSB21373HV11XT

Manufacturer Part Number
PSB21373HV11XT
Description
Manufacturer
Infineon Technologies
Type
PCMr
Datasheet

Specifications of PSB21373HV11XT

Number Of Channels
1
Number Of Adc's
1
Number Of Dac's
1
Number Of Adc Inputs
1
Pin Count
44
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Data Sheet
7.2
7.2.1
Value after reset: 00
TR_
CONF0
DIS_TR
0: All layer-1 functions are enabled.
1: All layer-1 functions are disabled. The HDLC controller and codec part can still
L1SW
0: Layer 1 state machine of the SCOUT-DX is used
1: Layer 1 state machine is disabled. The functionality can be realized in software.
LDD
0: Clock generation after detection of any signal on the line in the power down state
1: No clock generation after detection of any signal on the line in the power down state
Note: If an interrupt is generated by the internal level detect circuitry, the microcontroller
operate via IOM-2. DCL and FSC pins become input.
The commands can be written in register TR_CMD and the status read from
the TR_STA.
has to set this bit to ’0’ for an activation of the line interface.
Transceiver, Interrupt and General Configuration Registers
TR_CONF0 - Transceiver Configuration Register
7
DIS_
TR
... Disable Transceiver
... Enable Layer 1 State Machine in Software
... Level Detection Discard
H
0
0
0
185
L1SW
0
0
0
LDD RD/WR (30
PSB 21373
2002-05-13
H
)

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