PSB21373HV11XT Infineon Technologies, PSB21373HV11XT Datasheet - Page 190

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PSB21373HV11XT

Manufacturer Part Number
PSB21373HV11XT
Description
Manufacturer
Infineon Technologies
Type
PCMr
Datasheet

Specifications of PSB21373HV11XT

Number Of Channels
1
Number Of Adc's
1
Number Of Dac's
1
Number Of Adc Inputs
1
Pin Count
44
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
7.2.8
Value after reset: 01
ISTA
For all interrupts in the ISTA register following logical states are applied:
0: Interrupt is not acitvated
1: Interrupt is acitvated
ST
When programmed (STI register), this interrupt is generated to enable the
microcontroller to lock on to the IOM timing, for synchronous transfers.
CIC
A change in C/I channel 0 or C/I channel 1 has been recognized. The actual value can
be read from CIR0 or CIR1.
TIN
The internal timer and repeat counter has expired (see TIMR register).
WOV
Used only if terminal specific functions are enabled (MODE.TSF=1).
Signals the expiration of the watchdog timer, which means that the microcontroller has
failed to set the watchdog timer control bits WTC1 and WTC2 (ADF1 register) in the
correct manner. A reset pulse has been generated by the SCOUT-DX.
TRAN
An interrupt originated in the transceiver interrupt status register (ISTATR) has been
recognized.
MOS
A change in the MONITOR Status Register (MOSR) has occured.
HDLC
An interrupt originated in the HDLC interrupt sources has been recognized.
Note: A read of the ISTA register clears only the TIN and WOV interrupts. The other
Data Sheet
interrupts are cleared by reading the corresponding status register
ISTA - Interrupt Status Register
7
0
... C/I Channel Change
... Timer Interrupt
... Watchdog Timer Overflow
... Transceiver Interrupt
... MONITOR Status
... HDLC Interrupt
... Synchronous Transfer
H
ST
CIC
TIN
190
WOV TRAN MOS HDLC
0
PSB 21373
2002-05-13
RD (3C
H
)

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