AD9643BCPZ-210 Analog Devices Inc, AD9643BCPZ-210 Datasheet - Page 11

• Manufacturer Part Number: AD9643BCPZ-210
• Description: IC ADC 14BIT SRL 210MSPS 64LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9643BCPZ-210

• Sampling Rate: 210MSPS
• Input Channel Type: Differential, Single Ended
• Data Interface: 3-Wire, Serial
• Supply Voltage Range - Analog: 1.7V To 1.9V
• Supply Voltage Range - Digital: 1.7V To 1.9V
• Rohs Compliant: Yes
• Resolution (bits): 14bit
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
Electrical
Environmental
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
AVDD to AGND
DRVDD to AGND
VIN+A/VIN+B, VIN−A/VIN−B to AGND
CLK+, CLK− to AGND
SYNC to AGND
VCM to AGND
CSB to AGND
SCLK to AGND
SDIO to AGND
OEB to AGND
PDWN to AGND
OR+/OR− to AGND
DCO+/DCO− to AGND
Operating Temperature Range
Maximum Junction Temperature
Storage Temperature Range
D0−/D0+ Through D13−/D13+
(Ambient)
Under Bias
(Ambient)
to AGND
Rating
−0.3 V to +2.0 V
−0.3 V to +2.0 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−40°C to +85°C
150°C
−65°C to +125°C
Rev. A | Page 11 of 36
THERMAL CHARACTERISTICS
The exposed paddle must be soldered to the ground plane for
the LFCSP package. This increases the reliability of the solder
joints, maximizing the thermal capability of the package.
Table 7. Thermal Resistance
Package Type
64-Lead LFCSP
1
2
3
4
Typical θ
plane. As shown in Table 7, airflow increases heat dissipation,
which reduces θ
package leads from metal traces, through holes, ground, and
power planes, reduces the θ
ESD CAUTION
Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air).
Per MIL-Std 883, Method 1012.1.
Per JEDEC JESD51-8 (still air).
Per JEDEC 51-7, plus JEDEC 25-5 2S2P test board.
9 mm × 9 mm
(CP-64-4)
JA
is specified for a 4-layer PCB with a solid ground
JA
. In addition, metal in direct contact with the
Airflow
Velocity
(m/sec)
0
1.0
2.0
JA
.
θ
26.8
21.6
20.2
JA
1, 2
θ
1.14
JC
1, 3
θ
10.4
JB
AD9643
1, 4
Unit
°C/W
°C/W
°C/W