AD9643BCPZ-210 Analog Devices Inc, AD9643BCPZ-210 Datasheet - Page 6

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AD9643BCPZ-210

Manufacturer Part Number
AD9643BCPZ-210
Description
IC ADC 14BIT SRL 210MSPS 64LFCSP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9643BCPZ-210

Sampling Rate
210MSPS
Input Channel Type
Differential, Single Ended
Data Interface
3-Wire, Serial
Supply Voltage Range - Analog
1.7V To 1.9V
Supply Voltage Range - Digital
1.7V To 1.9V
Rohs Compliant
Yes
Resolution (bits)
14bit
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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AD9643
DIGITAL SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.75 V p-p full-scale input range, DCS
enabled, unless otherwise noted.
Table 3.
Parameter
DIFFERENTIAL CLOCK INPUTS (CLK+, CLK−)
SYNC INPUT
LOGIC INPUT (CSB)
LOGIC INPUT (SCLK)
LOGIC INPUTS (SDIO)
LOGIC INPUTS (OEB, PDWN)
Input Capacitance
Input Resistance
Logic Compliance
Internal Common-Mode Bias
Differential Input Voltage
Input Voltage Range
Input Common-Mode Range
High Level Input Current
Low Level Input Current
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
Logic Compliance
Internal Bias
Input Voltage Range
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
1
2
1
2
Rev. A | Page 6 of 36
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Min
0.3
AGND
0.9
−10
−22
8
AGND
1.2
AGND
−5
−5
12
1.22
0
−5
−80
1.22
0
45
−5
1.22
0
45
−5
1.22
0
45
−5
CMOS/LVDS/LVPECL
CMOS/LVDS
Typ
0.9
4
10
0.9
1
16
26
2
26
2
26
5
26
5
Max
3.6
AVDD
1.4
+22
−10
12
AVDD
AVDD
0.6
+5
+5
20
2.1
0.6
+5
−45
2.1
0.6
70
+5
2.1
0.6
70
+5
2.1
0.6
70
+5
Unit
V
V p-p
V
V
μA
μA
pF
V
V
V
V
μA
μA
pF
V
V
μA
μA
pF
V
V
μA
μA
pF
V
V
μA
μA
pF
V
V
μA
μA
pF

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