MK2069-01GITR IDT, Integrated Device Technology Inc, MK2069-01GITR Datasheet - Page 7

• Manufacturer Part Number: MK2069-01GITR
• Description: IC VCXO CLK SYNCHRONIZER 56TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Synchronizerr

Specifications of MK2069-01GITR

• Pll: Yes
• Input: LVCMOS
• Output: LVCMOS
• Number Of Circuits: 1
• Ratio - Input:output: 3:3
• Differential - Input:output: No/No
• Frequency - Max: 160MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 160MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

External VCXO PLL Components
In general, the loop damping factor should be 0.7 or greater
to ensure output stability. A higher damping factor will create
less peaking in the passband and will further ensure output
stability with the presence of system and power supply
noise. A damping factor of 4 will ensure a passband peak
less then 0.2dB which may be required for network clock
wander transfer compliance. A higher damping factor may
also increase output clock jitter when there is excess digital
noise in the system application, due to the reduced ability of
the PLL to respond to and therefore compensate for phase
noise ingress.
Notes on setting the value of
As another general rule, the following relationship should be
maintained between components C
filter:
IDT® VCXO-BASED LINE CARD CLOCK SYNCHRONIZER
MK2069-01
VCXO-BASED LINE CARD CLOCK SYNCHRONIZER
C
P
Crystal Tuning
C
DON'T STUFF
Refer to "Crystal Tuning Load
Capacitors" Section
Capacitors
P
Optional
=
C
----- -
20
S
C
C
L
L
C
R
R
S
S
XTAL
SET
ISET
LFR
X1
X2
LF
C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
S
P
and C
P
in the loop
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
7
C
For higher damping factors (> 1), calculate the value of C
based on a C
of 1. This will minimize baseband peaking and loop
instability that can lead to output jitter.
C
charge pump correction pulses. A C
will result in increased output phase noise at the phase
detector frequency due to this. In extreme cases where
input jitter is high, charge pump current is high, and C
small, the VCXO input voltage can hit the supply or ground
rail resulting in non-linear loop response.
The best way to set the value of C
response software available from IDT (please refer to the
following section). C
just starts affecting the passband peak.
Loop Filter Response Software
Online tools to calculate loop filter response can be found at
www.idt.com/?app=calculators&source=support_menu.
P
P
establishes a second pole in the VCXO PLL loop filter.
also dampens VCXO input voltage modulation by the
S
value that would be used for a damping factor
P
should be increased in value until it
VCXO AND SYNTHESIZER
P
MK2069-01
is to use the filter
P
value that is too low
REV K 051310
P
is too
P