PCF2123TS/1,118 NXP Semiconductors, PCF2123TS/1,118 Datasheet - Page 33

IC SPI RTC/CALENDAR 14TSSOP

PCF2123TS/1,118

Manufacturer Part Number
PCF2123TS/1,118
Description
IC SPI RTC/CALENDAR 14TSSOP
Manufacturer
NXP Semiconductors
Type
Clock/Calendar/Alarmr
Datasheets

Specifications of PCF2123TS/1,118

Package / Case
14-TSSOP
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.1 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Function
Clock/Calendar
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.1 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Rtc Bus Interface
Serial (3-Wire, SPI)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4534-2
935286384118
PCF2123TS/1-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCF2123TS/1,118
Manufacturer:
VISHAY
Quantity:
15 160
Part Number:
PCF2123TS/1,118
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
PCF2123
Product data sheet
8.10 External clock test mode
A test mode is available which allows for on-board testing. In this mode it is possible to set
up test conditions and control the operation of the RTC.
The test mode is entered by setting bit EXT_TEST in register Control_1. Then
pin CLKOUT becomes an input. The test mode replaces the internal clock signal with the
signal applied to pin CLKOUT.
The signal applied to pin CLKOUT should have a minimum pulse width of 300 ns and a
maximum period of 1000 ns. The internal clock, now sourced from CLKOUT, is divided
down to 1 Hz by a 2
known state by using bit STOP. When bit STOP is set, the prescaler is reset to 0. (STOP
must be cleared before the prescaler can operate again.)
From a stop condition, the first 1 second increment will take place after 32 positive edges
on pin CLKOUT. Thereafter, every 64 positive edges will cause a 1 second increment.
Remark: Entry into test mode is not synchronized to the internal 64 Hz clock. When
entering the test mode, no assumption as to the state of the prescaler can be made.
Operation example:
Repeat 7 and 8 for additional increments.
1. Set EXT_TEST test mode (register Control_1, bit EXT_TEST = 1).
2. Set STOP (Control_1, bit STOP = 1).
3. Clear STOP (Control_1, bit STOP = 0).
4. Set time registers to desired value.
5. Apply 32 clock pulses to pin CLKOUT.
6. Read time registers to see the first change.
7. Apply 64 clock pulses to pin CLKOUT.
8. Read time registers to see the second change.
All information provided in this document is subject to legal disclaimers.
6
Rev. 4 — 22 December 2010
divide chain called a prescaler. The prescaler can be set into a
SPI Real time clock/calendar
PCF2123
© NXP B.V. 2010. All rights reserved.
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