LTC1403ACMSE Linear Technology, LTC1403ACMSE Datasheet - Page 7

• Manufacturer Part Number: LTC1403ACMSE
• Description: IC ADC 14BIT 2.8MSPS DIFF 10MSOP
• Manufacturer: Linear Technology

Specifications of LTC1403ACMSE

• Number Of Bits: 14
• Sampling Rate (per Second): 2.8M
• Data Interface: Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 12mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width) Exposed Pad
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PIN FUNCTIONS
BLOCK DIAGRAM
A
fully differentially with respect to A
differential swing and a 0V to V
A
fully differentially with respect to A
differential swing and a 0V to V
V
and to a solid analog ground plane with a 10μF ceramic
capacitor (or 10μF tantalum in parallel with 0.1μF ceramic).
Can be overdriven by an external reference between 2.55V
and V
GND (Pins 5, 6, 11): Ground and Exposed Pad. These
ground pins and the exposed pad must be tied directly to
the solid ground plane under the part. Keep in mind that
analog signal currents and digital output signal currents
fl ow through these pins.
V
supplies 3V to the entire chip. Bypass to GND and to a
solid analog ground plane with a 10μF ceramic capacitor
IN
IN
REF
DD
+
–
(Pin 7): 3V Positive Supply. This single power pin
(Pin 1): Noninverting Analog Input. A
(Pin 2): Inverting Analog Input. A
(Pin 3): 2.5V Internal Reference. Bypass to GND
DD
.
10μF
A
A
IN
IN
+
–
DD
DD
1
2
3
4
LTC1403A
common mode swing.
common mode swing.
V
GND
IN
REF
IN
5
+
–
+
–
S & H
with a –2.5V to 0V
with a 0V to 2.5V
6
REFERENCE
IN
IN
2.5V
–
+
operates
operates
14-BIT ADC
11
10μF
EXPOSED PAD
3V
7
(or 10μF tantalum in parallel with 0.1μF ceramic). Keep in
mind that internal analog currents and digital output signal
currents fl ow through this pin. Care should be taken to
place the 0.1μF bypass capacitor as close to Pins 6 and
7 as possible.
SDO (Pin 8): Three-State Serial Data Output. Each of
output data words represents the difference between
A
conversion.
SCK (Pin 9): External Clock Input. Advances the conver-
sion process and sequences the output data on the rising
edge. Responds to TTL (≤3V) and 3V CMOS levels. One
or more pulses wake from sleep.
CONV (Pin 10): Convert Start. Holds the analog input signal
and starts the conversion on the rising edge. Responds
to TTL (≤3V) and 3V CMOS levels. Two pulses with SCK
in fi xed high or fi xed low state start Nap mode. Four or
more pulses with SCK in fi xed high or fi xed low state start
Sleep mode.
V
IN
DD
+
and A
14
IN
–
analog inputs at the start of the previous
OUTPUT
THREE-
TIMING
LTC1403/LTC1403A
SERIAL
STATE
LOGIC
PORT
10
8
9
1403A BD
SDO
CONV
SCK
1403fb
7