TDA9955HL/17/C1,55 NXP Semiconductors, TDA9955HL/17/C1,55 Datasheet - Page 22

IC ADC 8BIT 170MSPS 100-LQFP

TDA9955HL/17/C1,55

Manufacturer Part Number
TDA9955HL/17/C1,55
Description
IC ADC 8BIT 170MSPS 100-LQFP
Manufacturer
NXP Semiconductors
Type
Videor
Datasheet

Specifications of TDA9955HL/17/C1,55

Resolution (bits)
8 b
Sampling Rate (per Second)
170M
Data Interface
Serial
Voltage Supply Source
Analog and Digital
Voltage - Supply
1.75 V ~ 1.85 V, 3.15 V ~ 3.45 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935281545557
TDA9955HL/17/C1
TDA9955HL/17/C1

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TDA9955HL/17/C1,55
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 18.
Legend: * = default value
Table 19.
Table 20.
Legend: * = default value
TDA9955HL_1
Product data sheet
Addr Register
1Ah
1Bh
1Ch
Programmed code (8-bits)
Decimal
0
:
247
Addr Register
20h
21h
22h
23h
BRIGHT_GY 7 to 0 BRIGHT_ GY[7:0] W
BRIGHT_BU 7 to 0 BRIGHT_ BU[7:0] W
BRIGHT_RV 7 to 0 BRIGHT_ RV[7:0] W
COARSE_GAINRV 7 to 4 -
FINE_GAINRV
AGC_HIGHRV
AGC_LOWRV
Bright levels registers (address 1Ah to 1Ch) bit description
Relationship between the brightness code and the clamp level
R/V video gain registers (addresses 20h to 23h) bit description
9.2.7 Clamp levels registers
9.2.8 Video gain registers (GAIN_RV, GAIN_BU, GAIN_GY)
Bit
Table 17.
Legend: * = default value
Bit
3 to 2 CLKFOR_SEL[1:0] W
1 to 0 x
Bit
3 to 0 COARSE_RV[3:0] W
7
6 to 0 FINE_RV[6:0]
7 to 0 HIGH_RV[7:0]
7
6 to 0 LOW_RV[6:0]
Symbol
Symbol
Symbol
-
-
PIXCLKGEN_CTRL1 register (address 17h) bit description
Binary MSB/LSB
0000 0000
:
1111 0111
Access Value Description
Rev. 01 — 17 March 2008
Access Value Description
W
Access Value
W
W
W
W
W
W
10h*
80h*
80h*
Triple 8-bit analog-to-digital video converter for HDTV
00
01*
10
11
10*
04h*
5Ch*
F0h*
90h*
G/Y brightness: these bits control the clamp level of the
G/Y channel
B/P
the B/P
R/P
the R/P
formatter clock selection: select the clock for the
ITU-R656 formatter
for test: must be set to default value for proper
operation
B
R
brightness: these bits control the clamp level of
brightness: these bits control the clamp level of
reserved for test
CLKFOR
not defined
0
B
R
Description
not used
coarse_rv: coarse gain value for channel R/V
not used
fine_rv: fine gain value for channel R/V
high_rv: AGC high value for channel R/V
not used
low_rv: AGC low value for channel R/V
channel
channel
Clamp code (decimal)
0
:
247
TDA9955HL
…continued
© NXP B.V. 2008. All rights reserved.
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