DAC108S085CIMT/NOPB National Semiconductor, DAC108S085CIMT/NOPB Datasheet - Page 20

• Manufacturer Part Number: DAC108S085CIMT/NOPB
• Description: IC DAC 10BIT OCTAL R-R 16-TSSOP
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of DAC108S085CIMT/NOPB

• Settling Time: 4.5µs
• Number Of Bits: 10
• Data Interface: Serial
• Number Of Converters: 8
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 4.85mW
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• For Use With: DAC108S085EB - BOARD EVALUATION FOR DAC108S085
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DAC108S085CIMT

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2.5.3 Programmable Attenuator
shows one of the channels of the DAC108S085 being used
as a single-quadrant multiplier. In this configuration, an AC or
DC signal can be driven into one of the reference pins. The
SPI interface of the DAC can be used to digitally attenuate the
signal to any level from 0dB (full scale) to 0V. This is accom-
plished without adding any noticeable level of noise to the
signal. An amplifier stage is shown in as a reference for ap-
plications where the input signal requires amplification. Note
how the AC signal in this application is ac-coupled to the am-
plifier before being amplified. A separate bias voltage is used
to set the common-mode voltage for the DAC108S085's ref-
erence input to V
swing. The multiplying bandwidth of V
V
2.6 DSP/MICROPROCESSOR INTERFACING
Interfacing the DAC108S085 to microprocessors and DSPs
is quite simple. The following guidelines are offered to hasten
the design process.
2.6.1 ADSP-2101/ADSP2103 Interfacing
Figure 17 shows a serial interface between the DAC108S085
and the ADSP-2101/ADSP2103. The DSP should be set to
operate in the SPORT Transmit Alternate Framing Mode. It is
programmed through the SPORT control register and should
be configured for Internal Clock Operation, Active Low Fram-
ing and 16-bit Word Length. Transmission is started by writing
a word to the Tx register after the SPORT mode has been
enabled.
2.6.2 80C51/80L51 Interface
A serial interface between the DAC108S085 and the
80C51/80L51 microcontroller is shown in . The SYNC signal
CM
of 2.5V and a peak-to-peak signal swing of 2V.
FIGURE 16. Programmable Attenuator
FIGURE 17. ADSP-2101/2103 Interface
A
/ 2, allowing the largest possible input
REF1,2
is 360kHz with a
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30031209
20
comes from a bit-programmable pin on the microcontroller.
The example shown here uses port line P3.3. This line is tak-
en low when data is transmitted to the DAC108S085. Since
the 80C51/80L51 transmits 8-bit bytes, only eight falling clock
edges occur in the transmit cycle. To load data into the DAC,
the P3.3 line must be left low after the first eight bits are trans-
mitted. A second write cycle is initiated to transmit the second
byte of data, after which port line P3.3 is brought high. The
80C51/80L51 transmit routine must recognize that the
80C51/80L51 transmits data with the LSB first while the
DAC108S085 requires data with the MSB first.
2.6.3 68HC11 Interface
A serial interface between the DAC108S085 and the 68HC11
microcontroller is shown in . The SYNC line of the
DAC108S085 is driven from a port line (PC7 in the figure),
similar to the 80C51/80L51.
The 68HC11 should be configured with its CPOL bit as a zero
and its CPHA bit as a one. This configuration causes data on
the MOSI output to be valid on the falling edge of SCLK. PC7
is taken low to transmit data to the DAC. The 68HC11 trans-
mits data in 8-bit bytes with eight falling clock edges. Data is
transmitted with the MSB first. PC7 must remain low after the
first eight bits are transferred. A second write cycle is initiated
to transmit the second byte of data to the DAC, after which
PC7 should be raised to end the write sequence.
2.6.4 Microwire Interface
shows an interface between a Microwire compatible device
and the DAC108S085. Data is clocked out on the rising edges
of the SK signal. As a result, the SK of the Microwire device
needs to be inverted before driving the SCLK of the
DAC108S085.
FIGURE 18. 80C51/80L51 Interface
FIGURE 20. Microwire Interface
FIGURE 19. 68HC11 Interface
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