AD9754ARU Analog Devices Inc, AD9754ARU Datasheet - Page 10

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AD9754ARU

Manufacturer Part Number
AD9754ARU
Description
IC DAC 14BIT 125MSPS 28-TSSOP
Manufacturer
Analog Devices Inc
Series
TxDAC®r
Datasheets

Specifications of AD9754ARU

Mounting Type
Surface Mount
Rohs Status
RoHS non-compliant
Settling Time
35ns
Number Of Bits
14
Data Interface
Parallel
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
220mW
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TSSOP
Resolution (bits)
14bit
No. Of Pins
28
Update Rate
125MSPS
Peak Reflow Compatible (260 C)
No
No. Of Bits
14 Bit
Leaded Process Compatible
No
Voltage Rating
5V
Number Of Channels
1
Resolution
14b
Interface Type
Parallel
Single Supply Voltage (typ)
5V
Dual Supply Voltage (typ)
Not RequiredV
Power Supply Requirement
Analog and Digital
Output Type
Current
Single Supply Voltage (min)
4.5V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Lead Free Status / Rohs Status
Not Compliant

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AD9754
These last two equations highlight some of the advantages of
operating the AD9754 differentially. First, the differential op-
eration will help cancel common-mode error sources associated
with IOUTA and IOUTB such as noise, distortion and dc off-
sets. Second, the differential code-dependent current and
subsequent voltage, V
ended voltage output (i.e., V
twice the signal power to the load.
Note that the gain drift temperature performance for a single-
ended (VOUTA and VOUTB) or differential output (V
the AD9754 can be enhanced by selecting temperature tracking
resistors for R
ship as shown in Equation 8.
REFERENCE OPERATION
The AD9754 contains an internal 1.20 V bandgap reference
that can be easily disabled and overridden by an external
reference. REFIO serves as either an input or output, depending
on whether the internal or external reference is selected. If
REFLO is tied to ACOM, as shown in Figure 17, the internal
reference is activated, and REFIO provides a 1.20 V output. In
this case, the internal reference must be compensated externally
with a ceramic chip capacitor of 0.1 F or greater from REFIO
to REFLO. Also, REFIO should be buffered with an external
amplifier having an input bias current less than 100 nA if any
additional loading is required.
The internal reference can be disabled by connecting REFLO to
AVDD. In this case, an external reference may then be applied
to REFIO as shown in Figure 18. The external reference may
provide either a fixed reference voltage to enhance accuracy and
drift performance or a varying reference voltage for gain control.
Note that the 0.1 F compensation capacitor is not required
since the internal reference is disabled, and the high input im-
pedance (i.e., 1 M ) of REFIO minimizes any loading of the
external reference.
ADDITIONAL
LOAD
Figure 17. Internal Reference Configuration
REF BUFFER
EXTERNAL
OPTIONAL
LOAD
and R
0.1 F
2k
DIFF
AD1580
SET
, is twice the value of the single-
1.2V
OUTA
due to their ratiometric relation-
FS ADJ
REFIO
AVDD
AD9754
+1.2V REF
or V
REFLO
OUTB
OUT1
OUT2
Figure 19. Single-Supply Gain Control Circuit
), thus providing
AGND
R
150pF
AD7524
FB
DB7–DB0
CURRENT
SOURCE
V
ARRAY
DD
DIFF
+5V
V
REF
AVDD
) of
R
SET
0.1V TO 1.2V
–10–
I
V
REF
REF
REFERENCE CONTROL AMPLIFIER
The AD9754 also contains an internal control amplifier that is
used to regulate the DAC’s full-scale output current, I
The control amplifier is configured as a V-I converter, as shown
in Figure 18, such that its current output, I
the ratio of the V
in Equation 4. I
sources with the proper scaling factor to set I
Equation 3.
The control amplifier allows a wide (10:1) adjustment span of
I
62.5 A and 625 A. The wide adjustment span of I
provides several application benefits. The first benefit relates
directly to the power dissipation of the AD9754, which is pro-
portional to I
second benefit relates to the 20 dB adjustment, which is useful
for system gain control purposes.
The small signal bandwidth of the reference control amplifier
is approximately 0.5 MHz. The output of the control amplifier
is internally compensated via a 150 pF capacitor that limits the
control amplifier small-signal bandwidth and reduces its output
impedance. Since the –3 dB bandwidth corresponds to the
dominant pole, and hence the time constant, the settling time of
the control amplifier to a stepped reference input response can
be approximated In this case, the time constant can be approxi-
mated to be 320 ns.
There are two methods in which I
R
which the internal reference is disabled, and the common-mode
voltage of REFIO is varied over its compliance range of 1.25 V
to 0.10 V. REFIO can be driven by a single-supply amplifier or
DAC, thus allowing I
OUTFS
SET
=
/R
EXTERNAL
SET
. The first method is suitable for a single-supply system in
AVDD
REF
over a 2 mA to 20 mA range by setting IREF between
Figure 18. External Reference Configuration
REFIO
FS ADJ
AD9754
+1.2V REF
R
SET
OUTFS
REF
REFLO
V
REFIO
REFIO
I
V
REF
is copied over to the segmented current
(refer to the Power Dissipation section). The
REFIO
REF
=
and an external resistor, R
150pF
/R
to be varied for a fixed R
SET
REFIO
FS ADJ
CURRENT
SOURCE
ARRAY
AD9754
AVDD
+1.2V REF
REF
AVDD
REFLO
can be varied for a fixed
REF
150pF
OUTFS
, is determined by
REFERENCE
CONTROL
AMPLIFIER
SET
SET
CURRENT
as stated in
SOURCE
ARRAY
, as stated
AVDD
. Since the
OUTFS
OUTFS
AVDD
REV. A
.

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