AD9754ARU Analog Devices Inc, AD9754ARU Datasheet - Page 11

• Manufacturer Part Number: AD9754ARU
• Description: IC DAC 14BIT 125MSPS 28-TSSOP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9754ARU

• Mounting Type: Surface Mount
• Rohs Status: RoHS non-compliant
• Settling Time: 35ns
• Number Of Bits: 14
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 220mW
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-TSSOP
• Resolution (bits): 14bit
• No. Of Pins: 28
• Update Rate: 125MSPS
• Peak Reflow Compatible (260 C): No
• No. Of Bits: 14 Bit
• Leaded Process Compatible: No
• Voltage Rating: 5V
• Number Of Channels: 1
• Resolution: 14b
• Interface Type: Parallel
• Single Supply Voltage (typ): 5V
• Dual Supply Voltage (typ): Not RequiredV
• Power Supply Requirement: Analog and Digital
• Output Type: Current
• Single Supply Voltage (min): 4.5V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / Rohs Status: Not Compliant

input impedance of REFIO is approximately 1 M , a simple,
low cost R-2R ladder DAC configured in the voltage mode
topology may be used to control the gain. This circuit is shown
in Figure 19 using the AD7524 and an external 1.2 V reference,
the AD1580.
The second method may be used in a dual-supply system in
which the common-mode voltage of REFIO is fixed, and I
varied by an external voltage, V
fier. An example of this method is shown in Figure 25 in which
the internal reference is used to set the common-mode voltage
of the control amplifier to 1.20 V. The external voltage, V
referenced to ACOM and should not exceed 1.2 V. The value of
R
and 625 A, respectively. The associated equations in Figure 20
can be used to determine the value of R
ANALOG OUTPUTS
The AD9754 produces two complementary current outputs,
IOUTA and IOUTB, which may be configured for single-end
or differential operation. IOUTA and IOUTB can be converted
into complementary single-ended voltage outputs, V
V
Transfer Function section by Equations 5 through 8. The
differential voltage, V
can also be converted to a single-ended voltage via a transformer
or differential amplifier configuration.
Figure 21 shows the equivalent analog output circuit of the
AD9754 consisting of a parallel combination of PMOS differen-
tial current switches associated with each segmented current
source. The output impedance of IOUTA and IOUTB is deter-
mined by the equivalent parallel combination of the PMOS
switches and is typically 100 k in parallel with 5 pF. Due to
the nature of a PMOS device, the output impedance is also
slightly dependent on the output voltage (i.e., V
and, to a lesser extent, the analog supply voltage, AVDD, and
full-scale current, I
dependency can be a source of dc nonlinearity and ac linearity
(i.e., distortion), its effects can be limited if certain precautions
are noted.
REV. A
SET
OUTB
is such that I
V
, via a load resistor, R
1 F
GC
Figure 20. Dual-Supply Gain Control Circuit
R
SET
OUTFS
REFMAX
DIFF
I
I
WITH V
REF
REF
. Although the output impedance’s signal
= (1.2 – V
, existing between V
and I
REFIO
FS ADJ
GC
AD9754
LOAD
+1.2V REF
REFMIN
V
GC
GC
REFIO
, applied to R
)/R
REFLO
, as described in the DAC
SET
AND 62.5 A
do not exceed 62.5 A
SET
150pF
.
OUTA
OUTA
CURRENT
SET
SOURCE
I
REF
ARRAY
AVDD
and V
via an ampli-
AVDD
and V
625A
OUTA
OUTB
GC
REF
OUTB
and
, is
is
)
–11–
IOUTA and IOUTB also have a negative and positive voltage
compliance range. The negative output compliance range of
–1.0 V is set by the breakdown limits of the CMOS process.
Operation beyond this maximum limit may result in a break-
down of the output stage and affect the reliability of the AD9754.
The positive output compliance range is slightly dependent on
the full-scale output current, I
nominal 1.25 V for an I
2 mA. Operation beyond the positive compliance range will
induce clipping of the output signal which severely degrades
the AD9754’s linearity and distortion performance.
For applications requiring the optimum dc linearity, IOUTA
and/or IOUTB should be maintained at a virtual ground via an
I-V op amp configuration. Maintaining IOUTA and/or IOUTB
at a virtual ground keeps the output impedance of the AD9754
fixed, significantly reducing its effect on linearity. However,
it does not necessarily lead to the optimum distortion perfor-
mance due to limitations of the I-V op amp. Note that the
INL/DNL specifications for the AD9754 are measured in
this manner using IOUTA. In addition, these dc linearity
specifications remain virtually unaffected over the specified
power supply range of +4.5 V to +5.5 V.
Operating the AD9754 with reduced voltage output swings at
IOUTA and IOUTB in a differential or single-ended output
configuration reduces the signal dependency of its output
impedance thus enhancing distortion performance. Although
the voltage compliance range of IOUTA and IOUTB extends
from –1.0 V to +1.25 V, optimum distortion performance is
achieved when the maximum full-scale signal at IOUTA and
IOUTB does not exceed approximately 0.5 V. A properly se-
lected transformer with a grounded center-tap will allow the
AD9754 to provide the required power and voltage levels to
different loads while maintaining reduced voltage swings at
IOUTA and IOUTB. DC-coupled applications requiring a
differential or single-ended output configuration should size
R
examples of various output configurations.
LOAD
accordingly. Refer to Applying the AD9754 section for
Figure 21. Equivalent Analog Output Circuit
AD9754
OUTFS
= 20 mA to 1.00 V for an I
OUTFS
. It degrades slightly from its
IOUTA
R
LOAD
AD9754
IOUTB
R
LOAD
AVDD
OUTFS
=