MT45W1ML16PAFA-70 WT Micron Technology Inc, MT45W1ML16PAFA-70 WT Datasheet - Page 8

• Manufacturer Part Number: MT45W1ML16PAFA-70 WT
• Manufacturer: Micron Technology Inc

Specifications of MT45W1ML16PAFA-70 WT

• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

Configuration Register Operation
lularRAM device performs its transparent self refresh.
Altering the refresh parameters can dramatically
reduce current consumption during standby mode.
Page mode control is also embedded into the CR. This
register can be updated anytime while the device is
operating in a standby state. Table 4 on page 11
describes the control bits used in the CR. At power up,
the CR is set to 0010h.
Access Using ZZ#
immediately after ZZ# makes a HIGH-to-LOW transi-
tion (Figure 8). The values placed on addresses A[20:0]
are latched into the CR on the rising edge of CE# or
WE#, whichever occurs first. LB#/UB# are “Don’t
Care.” Access using ZZ# is WRITE only.
09005aef80d481d3
AsyncCellularRAM_16_32.fm - Rev. A 2/18/04 EN
ADDRESS
The configuration register (CR) defines how the Cel-
The CR can be loaded using a WRITE operation
WE#
CE#
ZZ#
Figure 8: Load Configuration
t < 500ns
Register Operation
ADDRESS VALID
ASYNC/PAGE CellularRAM MEMORY
8
Software Access to the Configuration
Register
fied using a software sequence. The nature of this
access mechanism may eliminate the need for the ZZ#
pin.
simply be tied to V
ZZ# control purposes will no longer be required. How-
ever, ZZ# should not be tied to V
use DPD; DPD cannot be enabled or disabled using
the software access sequence.
sisting of two READ operations followed by two WRITE
operations (see Figure 8). The read sequence is virtu-
ally identical except that an asynchronous READ is
performed during the fourth operation (see Figure 9
on page 9).
ations is the highest address of the CellularRAM device
being accessed (1FFFFFh for 32Mb and FFFFFh for
16Mb); the contents of this address are not changed by
using this sequence. The data bus is used to transfer
data into or out of the CR.
ifies the function of the ZZ# pin. Once the software
sequence loads the CR, the level of the ZZ# pin no
longer enables PAR operation. PAR operation will be
updated whenever the software sequence loads a new
value into the CR. This ZZ# functionality will continue
until the next time the device is powered-up. The oper-
ation of the ZZ# pin is not affected if the software
sequence is only used to read the contents of the CR.
The use of the software sequence does not affect the
ability to perform the standard (ZZ# controlled)
method of loading the CR.
The contents of the CR can either be read or modi-
If the software mechanism is used, the ZZ# pin can
The CR is loaded using a four-step sequence con-
The address used during all READ and WRITE oper-
Writing to the CR using the software sequence mod-
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2 MEG x 16, 1 MEG x 16
CC
Q. The port line typically used for
©2004 Micron Technology, Inc. All Rights Reserved.
CC
Q if the system will
ADVANCE