AD9763AST Analog Devices Inc, AD9763AST Datasheet - Page 23

IC DAC 10BIT DUAL 125MSPS 48LQFP

AD9763AST

Manufacturer Part Number
AD9763AST
Description
IC DAC 10BIT DUAL 125MSPS 48LQFP
Manufacturer
Analog Devices Inc
Series
TxDAC+®r
Datasheet

Specifications of AD9763AST

Rohs Status
RoHS non-compliant
Settling Time
35ns
Number Of Bits
10
Data Interface
Parallel
Number Of Converters
2
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
450mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
For Use With
AD9763-EBZ - BOARD EVAL FOR AD9763

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DAC TRANSFER FUNCTION
Both DACs in the AD9763/AD9765/AD9767 provide comple-
mentary current outputs, I
full-scale current output (I
DAC CODE = 1024/4095/16,384 for the AD9763/AD9765/
AD9767, respectively), while I
provides no current. The current output appearing at I
I
AD9763, AD9765, and AD9767, respectively, can be expressed as
I
expressed as
where DAC CODE = 0 to 1024, 0 to 4095, or 0 to 16,384 (decimal
representation).
I
set by a reference voltage (V
It can be expressed as
where I
Current section.
The two current outputs typically drive a resistive load directly
or via a transformer. If dc coupling is required, I
should be directly connected to matching resistive loads (R
that are tied to the analog common (ACOM). Note that R
can represent the equivalent load resistance seen by I
as is the case in a doubly terminated 50 Ω or 75 Ω cable. The single-
ended voltage output appearing at the I
Note that the full-scale value of V
exceed the specified output compliance range to maintain the
specified distortion and linearity performance.
Equation 7 highlights some of the advantages of operating the
AD9763/AD9765/AD9767 differentially. First, the differential
operation helps cancel common-mode error sources associated
with I
Second, the differential code-dependent current and subsequent
voltage, V
output (that is, V
power to the load.
OUTB
OUTB
OUTFS
I
I
I
I
I
I
I
V
V
V
is a function of both the input code and I
for the AD9763, AD9765, and AD9767, respectively, can be
OUTA
OUTA
OUTA
OUTB
OUTB
OUTB
is a function of the reference current (I
OUTFS
OUTA
OUTA
OUTB
DIFF
REF
= (1023 − DAC CODE /1024) × I
= (1023 − DAC CODE /4096) × I
= (1023 − DAC CODE /16,384) × I
DIFF
= ( DAC CODE /1024) × I
= ( DAC CODE /4096) × I
= ( DAC CODE /16,384) × I
= ( I
and I
= 32 × I
is set as discussed in the Setting the Full-Scale
= I
= I
, is twice the value of the single-ended voltage
OUTB
OUTA
OUTA
OUTB
OUTA
× R
× R
− I
REF
such as noise, distortion, and dc offsets.
OUTB
LOAD
or V
LOAD
) × R
OUTB
OUTA
OUTFS
REFIO
LOAD
), thus providing twice the signal
OUTB
and I
) when all bits are high (that is,
) and an external resistor (R
OUTA
, the complementary output,
OUTFS
OUTFS
OUTB
OUTFS
and V
OUTA
. I
OUTA
REF
OUTFS
OUTFS
and I
OUTB
OUTFS
). This is nominally
OUTFS
provides a near
OUTA
OUTB
must not
OUTA
. I
and I
OUTA
nodes is
OUTA
or I
for the
LOAD
OUTB
OUTB
and
LOAD
SET
Rev. F | Page 23 of 44
(1)
(2)
(3)
(5)
(6)
(7)
,
).
)
The gain drift temperature performance for a single-ended
(V
AD9763/AD9765/AD9767 can be enhanced by selecting
temperature tracking resistors for R
ratiometric relationship.
ANALOG OUTPUTS
The complementary current outputs, I
DAC can be configured for single-ended or differential
operation. I
single-ended voltage outputs, V
resistor (R
The differential voltage (V
can be converted to a single-ended voltage via a transformer or
differential amplifier configuration. The ac performance of the
AD9763/AD9765/AD9767 is optimum and specified using a
differential transformer-coupled output in which the voltage
swing at I
unipolar output is desired, select IOUTA.
The distortion and noise performance of the AD9763/AD9765/
AD9767 can be enhanced when it is configured for differential
operation. The common-mode error sources of both I
I
of a transformer or differential amplifier. These common-mode
error sources include even-order distortion products and noise.
The enhancement in distortion performance becomes more
significant as the frequency content of the reconstructed waveform
increases. This is due to the first-order cancellation of various
dynamic common-mode distortion mechanisms, digital feed-
through, and noise.
Performing a differential-to-single-ended conversion via a trans-
former also provides the ability to deliver twice the reconstructed
signal power to the load, assuming no source termination. Because
the output currents of I
become additive when processed differentially. A properly selected
transformer allows the AD9763/AD9765/AD9767 to provide the
required power and voltage levels to different loads.
The output impedance of I
equivalent parallel combination of the PMOS switches associated
with the current sources and is typically 100 kΩ in parallel with
5 pF. It is also slightly dependent on the output voltage (that is,
V
maintaining I
op amp configuration results in the optimum dc linearity. Note that
the INL/DNL specifications for the AD9763/AD9765/AD9767 are
measured with I
OUTB
OUTA
OUTA
can be significantly reduced by the common-mode rejection
and V
and V
OUTA
LOAD
OUTA
OUTB
OUTB
OUTA
) as described in Equation 5 through Equation 7.
and I
) due to the nature of a PMOS device. As a result,
OUTA
and I
) or differential output (V
and/or I
OUTB
maintained at a virtual ground via an op amp.
OUTB
OUTA
is limited to ±0.5 V. If a single-ended
AD9763/AD9765/AD9767
can be converted into complementary
DIFF
OUTB
OUTA
and I
) existing between V
at a virtual ground via an I-V
and I
OUTA
OUTB
LOAD
and V
OUTB
are complementary, they
OUTA
and R
is determined by the
OUTB
DIFF
and I
) of the
SET
, via a load
OUTB
due to their
OUTA
, in each
and V
OUTA
and
OUTB

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