AD9763AST Analog Devices Inc, AD9763AST Datasheet - Page 29

• Manufacturer Part Number: AD9763AST
• Description: IC DAC 10BIT DUAL 125MSPS 48LQFP
• Manufacturer: Analog Devices Inc
• Series: TxDAC+®r

Specifications of AD9763AST

• Rohs Status: RoHS non-compliant
• Settling Time: 35ns
• Number Of Bits: 10
• Data Interface: Parallel
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 450mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• For Use With: AD9763-EBZ - BOARD EVAL FOR AD9763

SINGLE-ENDED, UNBUFFERED VOLTAGE OUTPUT
Figure 75 shows the AD9763/AD9765/AD9767 configured to
provide a unipolar output range of approximately 0 V to 0.5 V
for a doubly terminated 50 Ω cable, because the nominal full-
scale current (I
R
resistance seen by I
can be connected directly to ACOM or via a matching R
Different values of I
positive compliance range is adhered to. One additional
consideration in this mode is the INL (see the Analog Outputs
section). For optimum INL performance, the single-ended,
buffered voltage output configuration is suggested.
SINGLE-ENDED, BUFFERED VOLTAGE OUTPUT
CONFIGURATION
Figure 76 shows a buffered single-ended output configuration
in which the U1 op amp performs an I-V conversion on the
AD9763/AD9765/AD9767 output current. U1 maintains I
(or I
output impedance effect on the INL performance of the DAC,
as described in the Analog Outputs section. Although this single-
ended configuration typically provides the best dc linearity
performance, its ac distortion performance at higher DAC update
rates may be limited by the slewing capabilities of U1. U1
provides a negative unipolar output voltage, and its full-scale
output voltage is simply the product of R
full-scale output within U1’s voltage output swing capabilities
by scaling I
performance may result with a reduced I
current U1 has to sink will be subsequently reduced.
LOAD
OUTB
of 25 Ω. In this case, R
AD9763/
AD9765/
AD9767
AD9763/
AD9765/
AD9767
) at a virtual ground, thus minimizing the nonlinear
Figure 74. Single-Supply DC Differential-Coupled Circuit
OUTFS
I
I
Figure 75. 0 V to 0.5 V Unbuffered Voltage Output
OUTA
OUTB
I
I
OUTA
OUTB
OUTFS
and/or R
25Ω
OUTFS
OUTA
I
) of 20 mA flows through the equivalent
OUTFS
or I
and R
25Ω
C
= 20mA
FB
OPT
OUTB
. An improvement in ac distortion
LOAD
LOAD
. The unused output (I
25Ω
50Ω
represents the equivalent load
225Ω
225Ω
can be selected as long as the
500Ω
FB
OUTFS
V
and I
OUTA
AD8055
because the signal
500Ω
1kΩ
50Ω
= 0V TO 0.5V
OUTFS
OUTA
. Set the
AVDD
LOAD
or I
.
OUTA
OUTB
Rev. F | Page 29 of 44
)
POWER AND GROUNDING CONSIDERATIONS
Power Supply Rejection
Many applications seek high speed and high performance under
less than ideal operating conditions. In these applications, the
implementation and construction of the printed circuit board is
as important as the circuit design. Proper RF techniques must
be used for device selection, placement, and routing as well as
power supply bypassing and grounding to ensure optimum
performance. Figure 92 to Error! Reference source not found.
illustrate recommended printed circuit board ground, power,
and signal plane layouts that are implemented on the
AD9763/AD9765/AD9767 evaluation board.
One factor that can measurably affect system performance is
the ability of the DAC output to reject dc variations or ac noise
superimposed on the analog or digital dc power distribution.
This is referred to as the power supply rejection ratio (PSRR).
For dc variations of the power supply, the resulting performance
of the DAC directly corresponds to a gain error associated with
the DAC’s full-scale current, I
is common in applications where the power distribution is
generated by a switching power supply. Typically, switching
power supply noise occurs over the spectrum of tens of
kilohertz to several megahertz. The PSRR vs. frequency of the
AD9763/AD9765/AD9767 AVDD supply over this frequency
range is shown in Figure 77.
AD9763/
AD9765/
AD9767
90
85
80
75
70
Figure 77. AVDD Power Supply Rejection Ratio vs. Frequency
0.2
I
I
OUTA
OUTB
0.3
Figure 76. Unipolar Buffered Voltage Output
I
OUTFS
0.4
= 10mA
0.5
AD9763/AD9765/AD9767
FREQUENCY (MHz)
200Ω
0.6
OUTFS
. AC noise on the dc supplies
0.7
C
200Ω
R
U1
OPT
FB
0.8
0.9
V
OUT
1.0
= I
OUTFS
1.1
× R
FB