EPM570ZM256C6N Altera, EPM570ZM256C6N Datasheet - Page 21

IC MAX IIZ CPLD 570 LE 256-MBGA

EPM570ZM256C6N

Manufacturer Part Number
EPM570ZM256C6N
Description
IC MAX IIZ CPLD 570 LE 256-MBGA
Manufacturer
Altera
Series
MAX® IIr
Datasheets

Specifications of EPM570ZM256C6N

Programmable Type
In System Programmable
Delay Time Tpd(1) Max
9.0ns
Voltage Supply - Internal
1.71 V ~ 1.89 V
Number Of Logic Elements/blocks
570
Number Of Macrocells
440
Number Of I /o
160
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-MBGA
Voltage
1.8V
Memory Type
FLASH
Number Of Logic Elements/cells
570
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
544-2453

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Chapter 2: MAX II Architecture
MultiTrack Interconnect
Figure 2–10. R4 Interconnect Connections
Notes to
(1) C4 interconnects can drive R4 interconnects.
(2) This pattern is repeated for every LAB in the LAB row.
© October 2008 Altera Corporation
Figure
2–10:
The R4 interconnects span four LABs and are used for fast row connections in a four-
LAB region. Every LAB has its own set of R4 interconnects to drive either left or right.
Figure 2–10
drive and be driven by row IOEs. For LAB interfacing, a primary LAB or horizontal
LAB neighbor can drive a given R4 interconnect. For R4 interconnects that drive to the
right, the primary LAB and right neighbor can drive on to the interconnect. For R4
interconnects that drive to the left, the primary LAB and its left neighbor can drive on
to the interconnect. R4 interconnects can drive other R4 interconnects to extend the
range of LABs they can drive. R4 interconnects can also drive C4 interconnects for
connections from one row to another.
The column interconnect operates similarly to the row interconnect. Each column of
LABs is served by a dedicated column interconnect, which vertically routes signals to
and from LABs and row and column IOEs. These column resources include:
MAX II devices include an enhanced interconnect structure within LABs for routing
LE output to LE input connections faster using LUT chain connections and register
chain connections. The LUT chain connection allows the combinational output of an
LE to directly drive the fast input of the LE right below it, bypassing the local
interconnect. These resources can be used as a high-speed connection for wide fan-in
LUT chain interconnects within an LAB
Register chain interconnects within an LAB
C4 interconnects traversing a distance of four LABs in an up and down direction
R4 Interconnect
Driving Left
shows R4 interconnect connections from an LAB. R4 interconnects can
Adjacent LAB can
drive onto another
LAB’s R4 Interconnect
Neighbor
LAB
Primary
LAB (2)
C4 Column Interconnects (1)
Neighbor
LAB
R4 Interconnect
Driving Right
MAX II Device Handbook
2–13

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