0W633-001-XTP ON Semiconductor, 0W633-001-XTP Datasheet - Page 17

• Manufacturer Part Number: 0W633-001-XTP
• Description: IC AUDIO PROCESSOR AD/DA 57LFBGA
• Manufacturer: ON Semiconductor
• Series: BelaSigna® 250r
• Type: Floating Pointr

Specifications of 0W633-001-XTP

• Interface: I²C, I²S, PCM, SPI, UART
• Clock Rate: 50MHz
• On-chip Ram: 42kB
• Voltage - I/o: 1.0V, 2.0V
• Voltage - Core: 1.00V, 2.00V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 57-LFBGA
• Package: 57CABGA
• Numeric And Arithmetic Format: Fixed-Point
• Ram Size: 16 KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Non-volatile Memory: -

MSET Reg, (Ri) [,SQ]
MUL [Cond] [,A] [,P]
NEG A [,Cond] [,DW]
NOP
OR A, Reg
OR A, (Rij)
OR A, DRAM [,B]
OR A, (Rij)p
OR A, Rc
ORI A, IMM
ORSI A, SIMM
POP Reg [,B]
POP Rc [,B]
PUSH Reg [,B]
PUSH Rc [,B]
PUSH IMM [,B]
REP n
REP Reg
REP (Rij)
RES Reg, Bit
RES (Rij), Bit
RET [B]
RND A
SET Reg, Bit
SET (Rij), Bit
SET_IE
SHFT n
SHFT A [,Cond] [,INV]
SLEEP [IE]
Instruction
Multiplier load
Update A and/or PH | PL with X*Y on
condition
Calculate negative value of A
on condition
No operation
OR register with AH to AH
OR memory with AH to AH
OR (DRAM) with AH to AH
OR program memory with AH to AH
OR Rc register with AH to AH
OR IMM with AH to AH
OR unsigned SIMM with AH to AH
Pop register from stack
Pop Rc register from stack
Push register on stack
Push Rc register on stack
Push IMM on stack
Repeat next instruction n+1 times
(9−bit unsigned)
Repeat next instruction Reg+1 times
Repeat next instruction (Rij)+1 times
Clear bit in register
Clear bit in memory
Return from subroutine
Round A with AL
Set bit in register
Set bit in memory
Set interrupt enable flag
Shift A by ± n bits (6−bit signed)
Shift A by EXP bits on condition
Sleep
Description
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17
SUB A, Reg [,C]
SUB A, (Rij) [,C]
SUB A, DRAM [,B]
SUB A, (Rij)p [,C]
SUB A, Rc [,C]
SUBI A, IMM [,C]
SUSI A, SIMM
SWAP A [,Cond]
TGL Reg, Bit
TGL (Rij), Bit
TST Reg, Bit
TST (Rij), Bit
A
B
C
Cond
DRAM
DW
IE
IMM
INV
P
PRAM
Rc
Reg
Ri / Rj / Rij
SIMM
SQ
Table 9. NOTATION
Symbol
Instruction
Accumulator update
Memory bank selection (X or Y)
Carry bit
Condition in status register
Low data (X or Y) memory address (8−bits)
Double word
Interrupt enable flag
Immediate data (16−bits)
Inverse shift
PH | PL update
Program memory address (16−bits)
Rc register (R0..7, PCFG0..2, PCFG4..6, LC0/1)
Data register (AL, AH, X, Y, ST, PC, PL, PH,
EXT0, EXP, AE, EXT3..EXT7)
Pointer to X / Y / either data memory
Short immediate data (10−bits)
Square
Subtract register from A
Subtract memory from A
Subtract (DRAM) from A
Subtract program memory from A
Subtract Rc register from A
Subtract IMM from A
Subtract signed SIMM from A
Swap AH, AL on condition
Toggle bit in register
Toggle bit in memory
Test bit in register
Test bit in memory
Meaning
Description