0W633-001-XTP ON Semiconductor, 0W633-001-XTP Datasheet - Page 25

• Manufacturer Part Number: 0W633-001-XTP
• Description: IC AUDIO PROCESSOR AD/DA 57LFBGA
• Manufacturer: ON Semiconductor
• Series: BelaSigna® 250r
• Type: Floating Pointr

Specifications of 0W633-001-XTP

• Interface: I²C, I²S, PCM, SPI, UART
• Clock Rate: 50MHz
• On-chip Ram: 42kB
• Voltage - I/o: 1.0V, 2.0V
• Voltage - Core: 1.00V, 2.00V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 57-LFBGA
• Package: 57CABGA
• Numeric And Arithmetic Format: Fixed-Point
• Ram Size: 16 KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Non-volatile Memory: -

Other Analog Support Blocks and Functions
Multi−Chip Sample Clock (MCLK) Synchronization
two or more BelaSigna 250 devices connected in a
multi−chip configuration. Samples on multiple chips will
synchronize to occur at the same instant in time. This is
useful in applications using microphone arrays where
synchronous sampling is required. The sample clock
synchronization is enabled using a control bit and a GPIO
assignment that brings all MCLKs across chips to zero phase
at the same instant in time.
Low−Speed A/D Converters (LSAD)
Combined with two internal LSAD inputs (supply and
ground), there are a total of eight multiplexed inputs to the
LSAD converter. The multiplexed inputs are sampled
sequentially at 1.6 kHz per channel when operating at MCLK
of 1.28 MHz (proportionally). The native data format for the
LSAD is 10−bit two’s−complement. However, a total of eight
operation modes are provided that allow a configurable input
dynamic range in cases where certain minimum and
maximum values for the converted inputs are desired, such as
in the case of a volume control where only input values up to
a certain magnitude are allowed. The six LSAD pads are
multiplexed with other functionality.
Battery Monitor
power management. The battery monitor works by
incrementing a counter value every time the battery voltage
goes below a desired, configurable threshold value. This
BelaSigna 250 allows MCLK synchronization between
Six LSAD inputs are available on BelaSigna 250.
A programmable on−chip battery monitor is available for
Internal Reset Signal
VDDCshutdown
VDDCnominal
VDDCstartup
Normal Power−Up
T
Power−On
POR
Reset
Figure 10. Power Management
http://onsemi.com
Shut−Down
Transient
25
counter value can be used in an application−specific
power−management algorithm running on the RCore. The
RCore can initiate any desired actions in case the battery hits
a predetermined value. This function is realized with an
internal LSAD tied directly to the power supply.
Infrared (IR) Remote Control
provided, which can receive commands wirelessly with the
attachment of a photovoltaic diode or similar component. Data
transfer from a remote unit is initiated by first transmitting a
burst sequence followed by the data to be transferred. The
data must be RS−232 formatted (8N1) and must be
modulated using a 40 kHz switched−carrier modulation
scheme. Data are received at 1200 bps by a dedicated UART.
The remote control receiver interacts with the RCore
through memory mapped control registers and interrupts.
package, nor on the WLCSP option.
Digital Interfaces
•
•
T
Power−On
POR
A switched−carrier IR remote control receiver interface is
This interface is not available on the 5 x 5 CABGA
BelaSigna 250 has the following digital interfaces:
16−pin general−purpose I/O (GPIO) interface.
Serial peripheral interface (SPI) communications port
with interface speeds up to 640 kbps at 1.28 MHz
system clock. The SPI port on BelaSigna 250 only
supports master mode, so it will only communicate with
SPI slave devices. When connecting to an SPI slave
device other than a boot EEPROM, the SPI_CS pin
should be left unconnected and the slave device CS line
should be driven from a GPIO to avoid BelaSigna 250
boot malfunction. When connecting to an SPI EEPROM
Reset
Dying Battery
Shut−Down
Time