EP2S30F672C3N Altera, EP2S30F672C3N Datasheet - Page 181

• Manufacturer Part Number: EP2S30F672C3N
• Description: IC STRATIX II FPGA 30K 672-FBGA
• Manufacturer: Altera
• Series: Stratix® IIr

Specifications of EP2S30F672C3N

• Number Of Logic Elements/cells: 33880
• Number Of Labs/clbs: 1694
• Total Ram Bits: 1369728
• Number Of I /o: 500
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• No. Of Macrocells: 33880
• Family Type: Stratix II
• No. Of I/o's: 500
• Clock Management: DLL, PLL
• I/o Supply Voltage: 3.6V
• Operating Frequency Max: 550MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-1896; EP2S30F672C3N

Altera Corporation
April 2011
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C I N
C O U T
P L L C I N
P L L C O U T
C I N
C O U T
P L L C I N
P L L C O U T
C I N
C O U T
P L L C I N
P L L C O U T
Table 5–53. EP2S60 Column Pins Global Clock Timing Parameters
Table 5–54. EP2S60 Row Pins Regional Clock Timing Parameters
Table 5–55. EP2S60 Row Pins Global Clock Timing Parameters
Parameter
Parameter
Parameter
Industrial
Industrial
Industrial
-0.097
-0.153
-0.148
-0.161
-0.156
1.658
1.501
1.463
1.468
1.439
1.444
0.06
Minimum Timing
Minimum Timing
Minimum Timing
Commercial
Commercial
Commercial
-0.108
-0.167
-0.162
-0.174
-0.169
1.739
1.574
0.057
1.532
1.537
1.508
1.513
-3 Speed
-3 Speed
-3 Speed
Grade
Grade
-0.079
-0.083
Grade
-0.083
-0.087
2.920
2.678
0.036
2.591
2.587
2.562
2.558
0.278
Stratix II Device Handbook, Volume 1
-4 Speed
-4 Speed
-4 Speed
Grade
Grade
-0.099
-0.103
Grade
-0.107
-0.111
3.350
3.072
0.304
0.026
2.972
2.968
2.940
2.936
DC & Switching Characteristics
-5 Speed
-5 Speed
-5 Speed
Grade
Grade
-0.128
-0.133
Grade
-0.126
-0.131
3.899
0.355
0.031
3.453
3.448
3.421
3.416
3.575
Unit
Unit
Unit
5–45
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns