EP2SGX60EF1152C5N Altera, EP2SGX60EF1152C5N Datasheet - Page 120

• Manufacturer Part Number: EP2SGX60EF1152C5N
• Description: IC STRATIX II GX 60K 1152-FBGA
• Manufacturer: Altera
• Series: Stratix® II GXr

Specifications of EP2SGX60EF1152C5N

• Number Of Logic Elements/cells: 60440
• Number Of Labs/clbs: 3022
• Total Ram Bits: 2544192
• Number Of I /o: 534
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• Family Name: Stratix II GX
• Number Of Logic Blocks/elements: 60440
• # I/os (max): 534
• Frequency (max): 609.76MHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 60440
• Ram Bits: 2544192
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2185

I/O Structure
Figure 2–76. Stratix II GX IOE Structure
2–112
Stratix II GX Device Handbook, Volume 1
Logic Array
Output B
Output A
Input B
Input A
OE
Output Register
Output Register
The IOEs are located in I/O blocks around the periphery of the
Stratix II GX device. There are up to four IOEs per row I/O block and four
IOEs per column I/O block. The row I/O blocks drive row, column, or
direct link interconnects. The column I/O blocks drive column
interconnects.
D
D
Q
Q
CLK
OE Register
OE Register
D
D
Q
Q
Input Register
Input Register
D
D
Q
Q
Input Latch
D
ENA
Altera Corporation
Q
October 2007